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High-Bandwidth Memory (HBM) ASIC Verification Engineer at Synopsys
Kanata, ON, Canada -
Full Time

Start Date

Immediate

Expiry Date

19 Oct, 25

Salary

0.0

Posted On

20 Jul, 25

Experience

8 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Good communication skills

Industry

Information Technology/IT

Description
Responsibilities
  • Verifying ASIC RTL designs at both chip and block levels, ensuring robust functionality and performance
  • Defining and tracking comprehensive verification testplans to guarantee thorough coverage and validation
  • Designing and developing constrained-random SystemVerilog testbenches using UVM (Universal Verification Methodology)
  • Creating and analyzing functional coverage metrics to identify gaps and optimize verification strategies
  • Writing SystemVerilog assertions to monitor and enforce design correctness
  • Debugging RTL and gate-level simulation failures, identifying root causes, and driving resolutions
  • Performing firmware-level debug as required to support system-level integration and testing
  • Tracking bugs using software tools such as Jira, maintaining clear documentation and follow-up
  • Conducting code coverage analysis to ensure all scenarios are exercised
  • Mentoring junior peers and networking with senior personnel to foster knowledge sharing and best practices