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(竹北)客製化記憶體IC Layout Engineer at Winbond Electronics Corporation

, , -

Full Time

Start Date

Immediate

Expiry Date

01 Mar, 26

Salary

0.0

Posted On

01 Dec, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

DRAM Layout, Flash Array Layout, Analog IC Layout, Mixed Signal IC Layout, Full Chip Layout, Mask Data Verification, ESD Protection, Latch Up Protection, EDA Tools, Design Rule Reading, Schematic Reading, Netlist Reading, Spice File Reading, Team Collaboration, Layout Optimization, Testkey Design

Industry

Semiconductor Manufacturing

Description

作為華邦的(竹北)客製化記憶體IC Layout Engineer ，你將負責佈線與線路最佳化，協助IC設計工程師畫出符合需求的高品質電路圖。工作內容包含：，以下為工作內容、工作條件以及重要通知。【工作內容】 1. DRAM/ Flash Array and Periphery layout know-how and ability 2. Analog and Mixed signal full custom IC layout know-how and ability 3. Full chip layout and verification know-how and ability 4. Mask data verification know-how and ability 5. ESD / Latch up protection know-how and ability 6. Knowledge of EDA tools (Custom Compiler, OPUS, Laker, Virtuoso, Caliber, etc) 7. Ability to read complex design rule, schematic, netlist, spice file .. Etc. IC Layout relative materials 8. Work with designer engineer to optimize layout. 9. Ability and good personality to work as a team. 10. TESTKEY/ TESTCHIP..etc. for the MASK design relative jobs request 工作地點：竹北辦公室(新竹縣竹北市文興路二段539號) 聘僱性質：全職【條件要求】學歷要求：大學科系要求：電機電子工程相關 │ │ 相關經驗：3年以上語言能力：英文中級 │ │ 管理責任：No 輪班需求：No 出差需求：無外派需求：No 其他條件： 1. 個性主動積極細心，具團隊精神。 2. 配合度高, 能配合公司制度規定與要求 3. 抗壓性強，能夠有效應付並處理特殊狀況並掌握時效即時回覆。 4. 語文能力：具備第二外語(日文)者尤佳。 #LI-LL1

Responsibilities

As a Customized Memory IC Layout Engineer at Winbond, you will be responsible for routing and optimizing circuits to assist IC design engineers in creating high-quality circuit diagrams. Your work will involve various layout tasks and collaboration with design engineers.