IC Package Design Engineer at Apple

, California, United States -

Full Time

Start Date

Immediate

Expiry Date

14 May, 26

Salary

0.0

Posted On

13 Feb, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Package Design, Physical Design, Layout, Optimization, DV, Tape Out, SoC, Memory, RF, Cellular Chips, Cadence Allegro, Mentor Xpedition, SI/PI Tools, Model Extraction, High-Speed Interfaces, Scripting

Industry

Computers and Electronics Manufacturing

Description

Do you have the attention for details and love for excellence to work towards an extraordinary result? Envision what you could do here! At Apple, we believe new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Our Hardware Technology Packaging team invents, designs, develops and integrates electronic packaging solutions for Apple’s internal and custom external components of hardware for its consumer electronic products such as iPhone, iPad, Mac, Apple Watch, Apple TV, etc. In this highly visible role, you will own and drive sophisticated package selection, new generation product package structure and configuration optimization. You will be responsible for Package/SIP/module physical design and layout, optimization, DV and tape out; and work with multi-functional teams to achieve optimized mechanical/electrical/ thermal performance for various types of chips. DESCRIPTION - Implement the physical design of packages and modules for SoC, Memory, RF, and cellular chips. - Interface and coordinate with multi-functional groups throughout Apple on new product package/SiP/module feasibility analysis, design and selection. MINIMUM QUALIFICATIONS BS and 10+ years of relevant industry experience PREFERRED QUALIFICATIONS As the IC Package Design Engineer, you demonstrate fundamental knowledge or proven experience in the following: Proven fundamentals in the electrical/material/thermal/ or mechanical engineering field(s). Familiarity with various sophisticated package configurations and assembly/ substrate technology (wirebond, POP, etc.). Experience in package design and proficient in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP) or Mentor Xpedition platform tools. Basic understanding in some SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters and RLGC model. Basic knowledge of substrate manufacturing process, structure, design rules and material property. Proven understanding of high-speed interfaces, including DDR, PCIe, NAND, etc. Exposure to Unix environment, scripting languages (PERL, Python, TCL and or shell) and methodology. Preferred Skills: Familiarity with CAM350/Valor or Calibre and CAD and experience with package design reviews. Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs, EMI/RFI, PCB/package resonance). Design experience with RFIC and 5G packages, SIP or module schematic and layout design experience. Solid understanding of Design Rules Check and Design for Manufacturing.

Responsibilities

The engineer will own and drive sophisticated package selection, new generation product package structure, and configuration optimization for consumer electronic components. Responsibilities include implementing the physical design, layout, optimization, DV, and tape out for packages and modules for various chip types, while coordinating with multi-functional teams.