Intern - Firesim development at SiFive

Berkeley, California, United States -

Full Time

Start Date

Immediate

Expiry Date

25 Jul, 26

Salary

39.0

Posted On

26 Apr, 26

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

RTL design, Chisel, Verilog, FPGA, C, C++, LLVM, CIRCT, Compiler development, Hardware emulation, RISC-V, CI/CD, Digital design, Software engineering

Industry

Semiconductor Manufacturing

Description

About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits. At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are. Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time. Are you ready? To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages. Job Description: The Role You will be joining SiFive’s FireSim team, which develops an internal, FPGA-based hardware emulation tool forked from the open-source FireSim project. Here you’ll get the opportunity to develop both emulator hardware (FPGA RTL) and runtime software (Scala, C++) to facilitate high-speed verification and validation of SiFive’s RISC-V processor IP. This is a multi-disciplinary team with projects available to students studying digital design, compiler development, and software engineering. Undergraduate applicants will work within a specific subsystem of FireSim according to their engineering preferences and career goals (e.g.: more compiler oriented students may work on CIRCT). Graduate students will have the opportunity to define a hardware emulation-oriented research project that can slot within the FireSim ecosystem. Responsibilities Report to the FireSim team in Berkeley, three days a week Core technical responsibilities include subset of: Developing compiler passes in our CIRCT-based emulation compiler Designing new emulator features using both Chisel and C++ Add robust tests for newly designed features Help maintain CI / CD systems related to their subsystem Help rollout new agentic processes to augment emulator subsystems, where appropriate Requirements Be enrolled in a Bachelor’s, Master’s, or PhD program in Computer Science, Computer Engineering, or Electrical Engineering Hardware-oriented students should have: Exposure to RTL design, using Chisel or Verilog Exposure to design for FPGA Software-oriented students should have: experience writing performance-optimized C or C++ code experience developing within LLVM, or CIRCT projects A combination of both would be ideal Strong communication and interpersonal skills and a desire to develop them that matches their desire to do technical work If you want to do incredible work and be challenged by exciting, truly innovative projects that will test the boundaries of your skills and creativity, then SiFive is the place for you! Be proud of your work. Do things better. Join SiFive. Pay & Benefits Consistent with SiFive values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience. For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee. Base Pay Range $32.40-$39.00 In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more! Additional Information: This position requires a successful background and reference checks and satisfactory proof of your right to work in United States of America Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals. SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations. California residents: please see our job candidate notice for more information on how we handle your personal information and your privacy rights: Privacy Policy Document. Championed by leaders who chose to make a real difference, SiFive led the RISC-V revolution—creating a tremendous wave with the strength to remove economic hurdles and create opportunities for all. Now that we’ve made history, you have the opportunity to write the future. If you love to be challenged, you can join the best of the best and get rewarded for doing something that truly matters.

Responsibilities

The intern will develop emulator hardware using FPGA RTL and runtime software in Scala and C++ to support high-speed verification of RISC-V processor IP. Responsibilities include designing new emulator features, developing compiler passes, and maintaining CI/CD systems.