Start Date
Immediate
Expiry Date
15 Sep, 26
Salary
0.0
Posted On
17 Jun, 26
Experience
0 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
Verification, Verilog, SystemVerilog, RTL Design, Digital Logic, DDR PHY, Die-to-Die Interface, Functional Coverage, Testbench Development, Bus Functional Models, Functional Debugging, Computer Architecture
Industry
Semiconductor Manufacturing