JOB DESCRIPTION

Start date: September or October 2025
Location: Eindhoven
Duration: min. 5-6 months, longer is possible and preferred
Type: thesis and non-thesis internship is possible
Modern medical imaging systems depend on real-time image processing to support physicians during minimally invasive procedures. These systems combine specialized hardware (e.g., FPGAs), embedded software, and PC-based applications to deliver high-performance, low-latency results.
As expectations for image quality, responsiveness and guidance increase, pre-trained AI models are becoming integral in areas like noise reduction, enhancement, and pattern recognition. While CPUs and GPUs are widely used for AI, FPGAs offer unique advantages: predictable timing, low latency, and hardware-level parallelism which is critical for real-time medical use cases.
To make AI deployment on FPGAs more accessible, new tools and frameworks allow engineers to implement inference models without writing low-level hardware description code. This opens opportunities to explore how existing trained models can be mapped to FPGA hardware using various flows.

PROBLEM DESCRIPTION:

Most AI models are developed and trained in high-level environments like Python and C++. Traditional FPGA development, using VHDL or Verilog, poses a barrier to rapidly deploying such models.
Emerging toolchains now support flows where trained models can be translated into synthesizable logic using high-level languages or model conversion frameworks. This assignment challenges the student to explore the state of the art in AI-on-FPGA inference, evaluate implementation options, and build a working prototype using a simple AI algorithm.