THE FUTURE STARTS HERE! READY TO JOIN NXP?

Become part of the Packaging Innovation Design Group developing novel design tools and methods while serving the entire global NXP organization. There is a lot of room for new ideas and innovation with continuous focus on development in a supportive environment.

YOUR TEAM

The Packaging Innovation Design Group provides package design for various business groups including automotive, industrial, edge processing and analog markets. These products enable edge AI and machine learning among other technologies using package architectures that meet performance, quality and cost targets.
We are currently looking for a student for a 6-month internship to bring efficiency improvements to the design tools and flows by designing, optimizing, and automating the software and systems used by the design teams. The role will apply scientific and engineering principles to develop and/or deploy new software code to automate design flow and software. Student must leverage creative, state-of-the-art engineering principles and theories to effectively translate to best practices in the design department. This candidate will participate in developing and maintaining the overall EDA tool strategy and design flow methodologies for package design within NXP.

• Knowledge of semiconductor package design with a specific focus on leading edge substrate-based packages such as Wire-Bond and Flip Chip PBGA.
• Knowledge of Cadence APD SIP, Allegro, Orbit IO, and/or AutoCAD.
• Knowledge of Python, SKILL, RAVEL, VBA programming languages.
• Experience with die to package co-design flows and knowledge of tools such as Virtuoso, Innovus and ICC2.
• Familiarity with various package substrate technologies and materials including HDI/build-up, coreless and conventional mechanically drilled.
• Ability to independently deliver results within the diverse technical global team within NXP as well as substrate, assembly and EDA suppliers.
• The candidate must be able to define and implement changes and improvements in design flow and tools where required.
• Working knowledge of die, package and/or PCB-level electrical simulation and parasitic extraction tools such as HFSS, Apache, Clarity, Sigrity, and Momentum is a plus.