IP Power Engineer at Advanced Micro Devices, Inc

, , China -

Full Time

Start Date

Immediate

Expiry Date

28 Apr, 26

Salary

0.0

Posted On

28 Jan, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Power Management, Digital Design, Verification, Power Optimization, Static Power Analysis, Dynamic Power Analysis, Power Gating, Voltage Scaling, Hardware Description Languages, Scripting Languages, Machine Learning, AI-Based Optimization, Physical Design, Power Characterization, Collaboration, Problem Solving

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The role is IP Power Enginner. AMD is seeking a highly skilled and motivated IP Power Engineer to join our MMHUB/ATHUB IP design team. In this role, you will be responsible for developing and implementing power management solutions for cutting-edge IP blocks used in AMD's high-performance products. You will work on power optimization, analysis, and verification to ensure our products meet stringent power, performance, and area (PPA) targets. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Develop power intent specifications using industry-standard formats (UPF/CPF) Create and optimize power domains, power gating strategies, and voltage/frequency scaling techniques Collaborate with RTL design teams to implement low-power design techniques at the microarchitecture level Perform static and dynamic power analysis using industry-standard tools (PrimeTime PX, Voltus, PowerArtist, etc.) Conduct power profiling and identify power optimization opportunities across different use cases and workloads Analyze power consumption trends and provide recommendations for power reduction Develop and maintain power models for early-stage power estimation Debug power-related issues in RTL, gate-level, and post-silicon environments Collaborate with DV teams to ensure power scenarios are adequately covered in functional verification PREFERRED EXPERIENCE: Strong understanding of digital design fundamentals technology. Knowledge of advanced process nodes (7nm, 5nm, 3nm and beyond) Proficiency in hardware description languages (Verilog, SystemVerilog, VHDL) Experience with UPF (Unified Power Format) and power-aware design flows Familiarity with power analysis tools (Synopsys PrimeTime PX, Cadence Voltus, or similar) Knowledge of power management techniques: clock gating, power gating, multi-voltage design, DVFS Understanding of static and dynamic power consumption mechanisms Experience with scripting languages (Python, Perl, TCL, Shell) for automation Experience with machine learning or AI-based power optimization techniques Background in physical design and understanding of power delivery networks Experience with post-silicon power characterization and debug ACADEMIC CREDENTIALS: Masters degree in computer engineering/Electrical Engineering #LI-EH1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

The IP Power Engineer will develop and implement power management solutions for IP blocks in AMD's high-performance products. Responsibilities include power optimization, analysis, and verification to meet power, performance, and area targets.