Junior Layout Engineer at NXP Semiconductors

Catania, Sicily, Italy -

Full Time

Start Date

Immediate

Expiry Date

09 Aug, 26

Salary

0.0

Posted On

11 May, 26

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Analog Layout, Floorplanning, Physical Verification, DRC/LVS/DFM, Parasitic Extraction, Cadence Virtuoso, Mentor Graphics Calibre, Device Physics, IC ESD Protection, Analog Custom Products, Cross Functional Collaboration, Technical Documentation

Industry

Semiconductor Manufacturing

Description

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics. NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace. This team will include all key engineering disciplines in Design, Architecture, Verification, DfT and Physical Design to produce high performance and quality products. Working in a fast-paced consumer environment, we are looking for an outstanding contributor to our Analog Layout team. This team will include support for MCU and for analog custom products being designed both in Catania but also globally. Your Responsibilities Delivering floorplan activities at IP level. Participating to the power supply strategy, signals distribution between blocks. Delivering Analog layout blocks. Running all physical verifications as DRC/LVS/DFM and parasitic extractions to achieve high quality layout deliveries. Participating to design reviews, write documentation and support for integration into products. Having a strong focus on design for quality (designs are properly verified, validated, and tested for long-term reliability and zero defect). Being able to leverage layout expertise to provide technical training and write technical guidelines Your Profile 0-2 years of experience leading Analog layout activities in complex ICs MSEE/BSEE or working equivalent Experience in Analog layouts, device physics, and IC ESD protection strategies Experienced in layout design tools such as Cadence Virtuoso (OA, PVS) and Mentor Graphics (Calibre) Ability to drive and collaborate with experienced people having different technical profiles Experience in delivering advanced floorplan strategies Experience in physical implementation in Analog blocks at IP level Experience with cross functional teams and excellent communication skills to operate in a global environment with multiple partners in design, test, program management, quality department More information about NXP in Italy... #LI-7795 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills. Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Thank you for considering a career at NXP. To help you prepare for the different steps in our hiring process, see the following useful advice and tips. Are you already an NXP employee? Do not apply here. Instead, you must apply via our internal career page. Thank you for your interest in supporting our recruitment efforts. Please note that NXP operates under a strict Preferred Supplier List (PSL) for all recruitment activities. Any candidate profiles or resume submitted without a prior written agreement or explicit request from our Talent Acquisition team will be considered unsolicited. Such submissions will be deemed free of any obligations, and no fees will be paid by NXP or any of its affiliates, subsidiaries, or divisions - regardless of whether the candidate is hired, either coincidentally or otherwise. Thank you for your understanding.

Responsibilities

Responsible for delivering IP-level floorplans and analog layout blocks while ensuring high quality through physical verification and parasitic extractions. The role involves participating in design reviews, writing technical guidelines, and supporting the integration of blocks into products.