Junior Mixed Signal Verification Engineer at NXP Semiconductors

Catania, Sicily, Italy -

Full Time

Start Date

Immediate

Expiry Date

02 Sep, 26

Salary

0.0

Posted On

04 Jun, 26

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Mixed Signal Verification, System Verilog, Verilog-AMS, Verilog-A, Analog Design, Functional Verification, DFT Strategy, SOC Design, Real Number Modeling, English Proficiency

Industry

Semiconductor Manufacturing

Description

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will produce world-class products at a world-class pace. This team will include all key engineering disciplines in Design, Architecture, Verification, DfT and Physical Design to produce high performance and quality products. We are now hiring a junior Mixed Signal Verification engineer for ensuring high quality designs that meet requirements by working closely with designers and systems engineers and creating simulation test cases, models, checkers and alike. Job Responsibility: Work with the global design teams to develop complex SOC with a high degree of quality standard. Develop SV Real Number and Verilog-AMS models for analog blocks. Run simulations and track coverage of verification plans. Find design bugs/issues in architecture/design of Analog/Mixed Signal IPs in terms of functional verification, robustness checks with latest verification methodologies. Top level analysis & verification of test-modes & DFT strategy for analog blocks. Your Profile: Bachelor's Degree in Electronic Engineering, Masters degree is preferred. A good understanding of analog and mixed-signal fundamentals is preferred. Knowledge in Verilog, System Verilog, Verilog-AMS and/or Verilog-A is a plus. 6+ months experience in Analog Mixed Signal design/verification is a plus. Strong communication and team work skills are required. English (read, spoken, written) is a must. More information about NXP in Italy... #LI-6710 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills. Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Thank you for considering a career at NXP. To help you prepare for the different steps in our hiring process, see the following useful advice and tips. Are you already an NXP employee? Do not apply here. Instead, you must apply via our internal career page. Thank you for your interest in supporting our recruitment efforts. Please note that NXP operates under a strict Preferred Supplier List (PSL) for all recruitment activities. Any candidate profiles or resume submitted without a prior written agreement or explicit request from our Talent Acquisition team will be considered unsolicited. Such submissions will be deemed free of any obligations, and no fees will be paid by NXP or any of its affiliates, subsidiaries, or divisions - regardless of whether the candidate is hired, either coincidentally or otherwise. Thank you for your understanding.

Responsibilities

Develop SV Real Number and Verilog-AMS models for analog blocks to ensure high-quality SOC designs. Run simulations, track coverage, and identify design bugs in Analog/Mixed Signal IPs using latest verification methodologies.