Lead FPGA architecture & Design Engineer at Advanced Micro Devices, Inc

Hyderabad, Telangana, India -

Full Time

Start Date

Immediate

Expiry Date

16 Jul, 26

Salary

0.0

Posted On

17 Apr, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

FPGA Design, Silicon Characterization, Verilog, SoC, IP Blocks, Timing Analysis, STA, Vivado, Python, Perl, Shell Scripting, PVT Variation, Debugging, Digital Hardware Design, Data Analysis

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. MTS SILICON DESIGN ENGINEER About the Role We are seeking a highly skilled and motivated Member of Technical Staff (MTS) to join our Speedfiles team. In this role, you will drive silicon characterization across complex, high‑performance SoC/IP blocks, working closely with physical design, RTL, methodology, and architecture teams. The ideal candidate has strong hands-on FPGA design creation and silicon characterization at different nodes, a deep understanding of semiconductor timing fundamentals, and a passion for delivering high-quality results. Key Responsibilities Identify and create FPGA patterns for IP silicon characterization Perform silicon characterization for different modes of IPs, debug, and resolve timing related issues Correlate speedfile data against post‑silicon characterization results across voltage, temperature, and process corners. Assist in root‑cause analysis for mismatches between silicon behavior and timing models. Validate fixes and improvements through regression, QA, and release validation cycles. Work closely with Quality, IP, and software teams. Silicon data collection across different PVT and to debug issues related to silicon data collection Debug and resolve complex issues involving correctness of pattern, clock skew, margins, voltage and temperature Participate in design reviews, debug discussions, and release readiness assessments. Document and present silicon characterization status, risks, and strategies to cross‑functional teams and management Required Qualifications Bachelor’s or Master’s degree in Electronics Engineering, VLSI, or related fields. 7–10 years of hands-on experience in digital hardware designing using Verilog on large AMD(Xilinx)/altera FPGAs. Strong understanding of FPGA architecture (fabric, routing, clocking, IOs). Solid foundations in digital design, timing analysis, and STA concepts. Hands‑on experience with FPGA tools (Vivado or equivalent). Experience with simulation‑based characterization and data analysis. Strong debugging skills across models, scripts, and timing data. Direct experience working on silicon characterization. Knowledge of PVT variation, speed grades, binning, and guard banding concepts Ability to collaborate effectively across geographically distributed teams Preferred Qualifications Experience with post‑silicon correlation Experience working in large, multi‑device production environments. Strong scripting skills in Python, Perl, or Shell scripting. Ability to work independently and drive tasks across ambiguous problem spaces. Excellent analytical, debugging, and problem-solving skills. Strong communication skills and ability to collaborate in a multi-site environment. #LI-SR4 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Responsibilities

The candidate will drive silicon characterization for complex SoC/IP blocks and perform FPGA pattern creation for IP validation. They will also be responsible for debugging timing issues, correlating speedfile data, and collaborating with cross-functional teams to ensure design quality.