Overview:
Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Sr Digital Design Engineer to join our MIC (Memory Interface Chip) team in San Jose, CA. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.
As a Sr Digital Design Engineer, you’ll play a pivotal role in MIC product development. In this full-time role, you’ll report directly to our Sr Dir Analog Engineering. Our MIC Engineering team is dedicated to developing DIMM Interface Chips, and your contributions will be instrumental in PMIC/TS/SPD projects.
Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

Responsibilities:

• Work with analog/digital design team for new product development
• Responsible for RTL coding, functional simulation, analog-block Verilog model, post-pr simulation
• Support bench test, support ATE test
• Support chip bringing-up, debugging, failure analysis, characterizations and product release efforts

Qualifications:

• Master degree or above in EE or related field
• At least 3 years of digital IC design experience
• Experience in the area listed below:
• Embedded SRAM/OTP/Efuse/MTP controller
• Design for test for digital block, analog block
• Communication bus such as I2C/I3C/SPI/AHB/APB
• Familiar to schematic editor
• Being Familiar to mixed signal design and backend is a plus
• Mass product experience is a plus
• Self-motivated and proactive
• Good communication skills and a strong team player

• Work with analog/digital design team for new product development
• Responsible for RTL coding, functional simulation, analog-block Verilog model, post-pr simulation
• Support bench test, support ATE test
• Support chip bringing-up, debugging, failure analysis, characterizations and product release effort