Lead Staff Engineer, Layout Design at Micron Technology

, jalisco, Mexico -

Full Time

Start Date

Immediate

Expiry Date

05 Sep, 26

Salary

0.0

Posted On

07 Jun, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Analog Layout Design, Mixed-Signal Layout, Custom Layout, CMOS Technology, FinFET, Cadence VLE/VXL, Mentor Graphics Calibre, LVS, DRC, Team Management, VLSI Engineering, Physical Design, Python, SKILL, Tcl, Tapeout Support

Industry

Semiconductor Manufacturing

Description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has been at the forefront of innovation, delivering the world’s most advanced memory and semiconductor technologies. Our distributed team of engineers, scientists, and visionaries is developing groundbreaking solutions that redefine how the world uses information to enrich life for all. We are seeking a Layout Design Engineering Led to join Micron's organization in Guadalajara, Mexico. In this leadership role, you will guide a distributed team focused on developing complex analog, mixed‑signal, and custom layouts powering next‑generation AI and high‑performance computing solutions. Responsibilities Lead a team designing and developing critical analog, mixed‑signal, and custom block layouts, including support for full‑chip-level integration. Oversee layout verification activities, including LVS, DRC, Antenna checks, documentation, and quality reviews. Ensure timely and high‑quality delivery of block‑level layouts that meet all project requirements. Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple concurrent projects. Mentor and guide layout engineers of all levels. Perform detailed reviews of sub‑block‑level layouts. Collaborate with global engineering teams to drive successful project execution and alignment across Micron’s worldwide footprint. Minimum Qualifications 10+ years of experience in analog/custom layout design in advanced CMOS technology nodes (Planar, FinFET). 5+ years of experience managing layout engineering teams. Proven ability to lead layout development processes with strong quality oversight. Bachelor’s degree, Master’s degree or equivalent experience in Electronics, VLSI Engineering, or related field. Expertise with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS. Hands‑on experience with critical IP blocks (PLL, ADC, DAC, bandgap, temperature sensors, charge pumps, current mirrors, comparators, differential amplifiers, etc.). Strong fundamentals in matching, electromigration, latch‑up, coupling, crosstalk, IR drop, and parasitic effects. Ability to analyze layout impact on speed, area, power, and overall circuit performance. Experience supporting multiple tapeouts. Preferred Qualifications Experience working with memories (HBM is a plus), or high‑performance computing products. Strong understanding of advanced physical design methodologies and emerging process technologies. Familiarity with scripting languages (Python, SKILL, Tcl) to automate layout tasks and improve design efficiency. Excellent communication and stakeholder‑management skills in fast‑paced, multi‑project environments. Strong interpersonal skills to help building team culture. "The specified role does not encompass the following responsibilities: Finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position." We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_na@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Responsibilities

Lead a distributed team in designing complex analog, mixed-signal, and custom layouts for AI and high-performance computing solutions. Oversee layout verification, project scheduling, and mentor engineers while collaborating with global teams for successful execution.