Logic Design Engineer at Wiliot

Hof HaCarmel Regional Council, Haifa District, Israel -

Full Time

Start Date

Immediate

Expiry Date

07 Mar, 26

Salary

0.0

Posted On

07 Dec, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Logic Design, Digital Circuits, SoC Design, RTL Design, Synthesis, Timing Analysis, Power Optimization, Team Collaboration, Debugging, Verilog, SystemVerilog, EDA Tools, Low Power Design, Problem Solving, Analog ICs, RISC-V

Industry

technology;Information and Internet

Description

Wiliot was founded by the team that invented one of the technologies at the heart of 5G. Their next vision was to develop an IoT sticker, a computing element that can power itself by harvesting radio frequency energy, bringing connectivity and intelligence to everyday products and packaging, things previously disconnect from the IoT. This revolutionary mixture of cloud and semiconductor technology is being used by some of the world’s largest consumer, retail, food and pharmaceutical companies to change the way we make, distribute, sell, use and recycle products. Our investors include Softbank, Amazon, Alibaba, Verizon, NTT DoCoMo, Qualcomm and PepsiCo. Responsibilities Design and implement complex digital circuits for ultra low-power SoC. Participate in all phases of SoC design, from specification to coding, debug and tape-out. Perform RTL design, synthesis, and timing analysis. Optimize designs for power, performance, and area (PPA). Collaborate with cross-functional teams, including architecture, System, Software, Analog, verification, and physical design engineers. Contribute to the development of design methodologies and best practices. Debug and resolve design issues. Support Lab bring ups, debug and other activities Requirements Bachelor's Or Master's degree in Electrical Engineering, Computer Engineering, or a related field Minimum 5 years of experience in logic design, working in both IP and SOC environments Proficiency in Verilog or SystemVerilog for design Experience with industry-standard EDA tools (Synopsys VC, Cadence etc) Knowledge in low power design techniques Knowledge of RTL synthesis and timing analysis flows Strong communication and teamwork abilities Excellent problem-solving and debugging skills Advantage Experience with Analog ICs, Mix-signals design, and Lab equipment Experience with RISC-V based SoC and FW #LI-Hybrid

Responsibilities

The Logic Design Engineer will design and implement complex digital circuits for ultra low-power SoCs and participate in all phases of SoC design, from specification to coding, debug, and tape-out. They will also collaborate with cross-functional teams and contribute to the development of design methodologies and best practices.