Low Power Design Verification Engineer at Advanced Micro Devices, Inc

Boxborough, Massachusetts, United States -

Full Time

Start Date

Immediate

Expiry Date

08 Apr, 26

Salary

0.0

Posted On

08 Jan, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SoC Verification, Low Power Design, Debugging, UVM, Digital Design, Analytical Skills, Problem Solving, Collaboration, Firmware, RTL, Simulation Tools, Scripting, Assembly, Verilog, System Verilog, C, C++

Industry

Semiconductor Manufacturing

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The focus of this role is to develop, execute, debug tests and methodologies for SoC low power features. You will work closely with the Architecture, IP/SoC Design, Physical Design Teams, and Product Engineers to achieve first pass silicon success. THE PERSON: Join us if you have passion for modern, complex processor and SoC architectures, digital design and verification. We are looking for a team player who has excellent communication skills and experience collaborating with engineers located in different sites/time zones. The ideal candidate for this role will possess strong analytical and problem solving skills, and are willing to learn and ready to take on challenges. KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Estimate the time required to write the new feature tests and any required changes to the test environment Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: SoC level ASIC verification experience Experience with multiple SoC tape-outs taken to production Hands on experience of Low Power design and verification methodologies (e.g., UPF, power domains, multi-voltage) NPU/AI processor knowledge Proficient in debugging firmware and RTL code using simulation tools Proficient in developing and using UVM based verification frameworks and testbenches, processes and flows in both Linux and Windows environments Automating workflows in a distributed compute environment Experienced with Assembly, Verilog, System Verilog, C, C++ Good understanding and hands-on experience in the UVM concepts Good working knowledge of SystemC and TLM with some related experience Scripting language experience: Perl, Python, Ruby, Makefile, shell preferred ACADEMIC CREDENTIALS: Bachelors, Masters or PHD in Computer Science, Electrical Engineering or relevant fields LOCATION: Boxborough, MA This role is not eligible for Visa Sponsorship. #LI-IA1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Responsibilities

The role involves developing, executing, and debugging tests for SoC low power features while collaborating with various engineering teams. The engineer will also build test plans, debug failures, and ensure coverage requirements are met.