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Master Thesis: Python-based Trace and Debug of FPGA Designs at Ericsson

London, England, United Kingdom -

Full Time

Start Date

Immediate

Expiry Date

05 Jan, 26

Salary

0.0

Posted On

07 Oct, 25

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Python, FPGA Designs, Coaching, Mentoring, Innovation, Creativity, Google GCP, AWS Public Cloud

Industry

Telecommunications

Description

- CEE10 Design DGS. - SDI3 Upgrade. - SDI3 Solution Design. - SDI3 Integration. - GDCE. - Coaching and Mentoring. - Innovation and Creativity. - Google GCP. - AWS Public Cloud.

Responsibilities

The role involves designing, upgrading, and integrating FPGA solutions. It also includes coaching and mentoring team members while fostering innovation and creativity.