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Mixed-Signal IP Firmware Engineer at Apple
Cupertino, California, United States -
Full Time

Start Date

Immediate

Expiry Date

11 May, 26

Salary

0.0

Posted On

10 Feb, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Firmware Development, C Programming, Assembly Language, ARM CPUs, MCUs, ISR, Computer Architecture, Version Control, Real-Time Operating System, Mixed Signal Concepts, RTL, Verilog, Communication Skills, Presentation Skills

Industry

Computers and Electronics Manufacturing

Description
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a results-oriented and extraordinarily hardworking FW Design Engineer. As a member of our multifaceted group, you will have the outstanding and great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. DESCRIPTION In this job you will be responsible to develop firmware in C to implement critical FW features for IPs inside SOC. You will be required to understand IPs by reading their specifications. You will also be responsible to support post-silicon bringup, validation, performance characterization, system integration and debugging. MINIMUM QUALIFICATIONS BS degree in technical discipline with minimum 3 years of relevant experience PREFERRED QUALIFICATIONS Proven excellence in FW development using C and assembly language with ARM CPUs. Solid understanding of MCUs and ISR. Solid understanding of computer architecture. Experience with version control tools (git, Perforce) is a plus. Experience with real-time operation system is a plus. Understanding of mixed signal concepts is a plus. Familiarity with RTL or Verilog is a plus. Strong communication and presentation skills.
Responsibilities
You will be responsible for developing firmware in C to implement critical firmware features for IPs inside SOC. Additionally, you will support post-silicon bringup, validation, performance characterization, system integration, and debugging.