At Apple, Platform Architecture is responsible for connecting our hardware and software into one unified system. Join this team, and you’ll collaborate with engineers across Apple to design how all of our technologies work in unison. In this role, you will be part of the Neural Engine IP architecture team to define, architect, design, implement and deploy models for Neural Engine IP.

DESCRIPTION

As a Neural Engine Compiler and Modeling Engineer, you will be responsible for developing, integrating and maintaining software models for Neural Engine.

MINIMUM QUALIFICATIONS

• BS degree
• Experience coding in C/C++ and Python
• Domain knowledge in at least one hardware IP: ML HW accelerators or processing units such as GPU, image/video, CPUs, or similar

PREFERRED QUALIFICATIONS

• MS or PhD degree
• 20+ years of experience developing models for hardware validation
• Experience developing compiler for ML accelerators
• Experience developing C++ bit accurate models for hardware verification
• Familiarity with working in a chip development environment with RTL designers and verification engineers
• Experience integrating IP models into chip simulation platforms
• Experience debugging complex models

• Develop and optimize a compiler for a Neural Engine IP to support efficient execution of state-of-the-art ML workloads
• Define, document and implement C/C++ bit-accurate and transaction level models with SoC and Neural Engine arch teams
• Collaborate with design and verification teams to define C-model interfaces for validation and debug
• Develop and maintain architecture test cases and automated workflows to verify the correct functionality of the models