Packaging Engineer (Substrate Design and Layout, Only open for fresh gradua at Sandisk

Taichung, , Taiwan -

Full Time

Start Date

Immediate

Expiry Date

13 Aug, 26

Salary

0.0

Posted On

15 May, 26

Experience

0 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Package Design, Substrate Layout, EDA Tools, Cadence SIP, Allegro, Routing Planning, Layer Stack-up Configuration, Design-for-Manufacturability, AutoCAD, Altium, Mentor, Technical Documentation, Analytical Problem Solving, Cross-functional Collaboration

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description Participate in the development of package design and advanced substrate layout for products. Learn and become proficient in EDA layout tools (e.g., Cadence SIP/Allegro) to perform package and substrate drawing, design modifications, and related engineering tasks. Perform basic routing planning, layer stack‑up configuration, and design‑for‑manufacturability (DFM) checks based on established design rules and manufacturing requirements. Collaborate with cross‑functional engineering teams—including hardware, manufacturing, and packaging—to support package structure evaluations, design updates, and issue resolution. Qualifications Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, Materials Science, Mechanical Engineering, Physics, or other related engineering/science fields. Coursework, project experience, or internships related to semiconductor packaging, electronics design, PCB/substrate design, or similar areas are preferred but not required. Strong willingness to learn and ability to quickly grasp package design workflows, substrate layout methodologies, and relevant EDA tools. Effective communication and teamwork skills, with the ability to work collaboratively in cross‑functional environments. Skills Experience with any EDA or CAD design software (e.g., Cadence, AutoCAD, Altium, Mentor) is preferred; candidates without prior experience but with strong learning motivation are also welcome. Strong analytical and problem‑solving abilities to support engineering tasks and development activities. Ability to organize and prepare technical documentation and follow design guidelines and operational procedures. Capability to collaborate with global teams and interface with external suppliers, with an understanding of manufacturing and process requirements. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Business Function: Packaging Engineering Work Location: Taichung Office--LOC_SNDK_Taichung SNDK Office

Responsibilities

Participate in the development of package design and advanced substrate layout using EDA tools. Collaborate with cross-functional teams to perform routing planning, DFM checks, and resolve design issues.