PE Logic Design at Rambus

, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

25 Jul, 26

Salary

0.0

Posted On

26 Apr, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

RTL design, Verilog, System Verilog, Micro architecture, Lint, CDC, RDC, Constraint validation, Physical design, Timing closure, Post silicon validation, Perl, Tcl, Python, ASIC logic design, High speed protocols

Industry

Semiconductor Manufacturing

Description

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional PE Logic Design Engineer to join our MIC Design IDC team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work. Responsibilities Understand the spec requirements and convert into a micro architecture specification. Realize the RTL design using Verilog/System Verilog. Works with verification teams in defining the test plan and reviews the test coverage. Does pre implementation design checks like lint, CDC, RDC, constraint validation. Works with physical design team in defining the design and timing constraints and driving implementation till timing closure. Interact with cross functional circuit teams for new product development Participate in Architecture level discussions to define the specifications. Post silicon validation support in bringing up parts. Qualifications Minimum 8 years of solid ASIC logic/Digital design expertise with bachelor’s degree or master’s degree Strong digital design fundamentals. Strong hands on expertise in HDLs like Verilog/System Verilog. Experience with EDA tools for simulation, synthesis, and timing analysis and logic equivalence check. Knowledge of High speed protocols is plus. Strong scripting abilities using Perl/Tcl/python is a plus Strong written and verbal communication skills. Able to break down technical concepts to a larger audience is desired. About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems. Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits. Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

Responsibilities

The engineer will be responsible for converting specifications into micro-architecture and realizing RTL designs using Verilog/System Verilog. They will also collaborate with verification and physical design teams to ensure design integrity, timing closure, and post-silicon validation.