Physical Design Engineer, SoC/IP (Senior/Staff/Senior Staff/Principal) at Analogue Insight

, , United Kingdom -

Full Time

Start Date

Immediate

Expiry Date

21 Jun, 26

Salary

0.0

Posted On

23 Mar, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Physical Design, Synthesis, PnR, Timing Closure, Floorplanning, Clocking, Power Optimization, Flow Development, Sign-off, Scripting, Tcl, Skill, Cadence Flow, Primetime, Innovus, RedHawk

Industry

Semiconductor Manufacturing

Description

THE COMPANY Established in early 2024, at Analogue Insight we are bridging the Analogue and Digital Worlds for Tomorrow through our Chiplet Solutions. Our core expertise lies in developing cutting-edge Chiplet technology that serves as the building block for advanced communication systems. Our Chiplets are designed to offer high performance, scalability, and integration flexibility, enabling our clients to achieve breakthroughs in computation speed, data processing, and connectivity. For more information about us, check out our website (Analogue Insight [https://analogueinsight.com/]) and LinkedIn Page (Analogue Insight™: Overview | LinkedIn [https://www.linkedin.com/company/analogue-insight/?viewAsMember=true]). THE ROLE We are seeking a highly skilled Physical Design Engineer to play a key role in delivering high-quality analog and mixed-signal IP and our chiplet-based solutions. You will take ownership of layout execution from early planning through tape-out, working closely with analog designers to ensure performance, robustness, and manufacturability across advanced technology nodes. This role is well suited to engineers who enjoy deep, hands-on technical ownership and working closely with design teams in a fast-moving, high-impact environment. Hiring Manager: Christian Borelli [https://www.linkedin.com/in/borellichristian/], Founder and CSO. KEY RESPONSIBILITIES * Define PD requirements by working closely with the front-end team, understand the chip architecture and drive physical aspects early in the design cycle * Physical design tasks including such as synthesis, PnR, timing closure, area improvement, floorplanning, clocking, I/O planning and power optimization * Discussions with 3rd party IP providers, foundry partners and design services * End to end tasks from flow development to sign-off * Deploy innovative techniques for improving power, performance and area of the design, drive experiments with RTL, and evaluate synthesis, timing and power results * Scripting & Automation: Develop and maintain scripts (e.g. Skill/TCL) to improve layout productivity, consistency, and quality. * Mentorship & Technical Leadership: Mentor junior layout engineers, sharing best practices and contributing to continuous improvement of layout methodologies and flows. WHAT WE’RE LOOKING FOR Must-have Technical skills: * Minimum BS and 5+ years of experience in Physical Design * Hands-on experience with synthesis, block and chip level implementation with industry standard PnR flows and tools using Cadence flow * Strong experience in SOC/ASIC/GPU/CPU design flows on taped out designs, expertise in timing closure at block/chip levels and ECO flows * Experience with back-end design tools such as Primetime, Innovus, RedHawk, etc. * Knowledge of low-power design flows such as power gating, multi-Vt and voltage scaling * Strong programming skills in Tcl/Perl/Shell/Python * Excellent understanding of logic design fundamentals and gate/transistor level implementation * Exposure to DFT is an asset * Prior experience working on high performance technology nodes and understanding of deep sub-micron design problems/solutions * Strong problem solving and debug skills across various levels of design hierarchies Soft & Professional Skills: * Clear, structured communication in professional English—able to explain complex results concisely * Collaborative and feedback-oriented mindset * Demonstrated ability to mentor and guide less experienced engineers * Strong ownership, reliability, and follow-through * Curious, self-motivated attitude, eager to learn and explore new tools or methods * High level of integrity and professionalism in representing the company and handling sensitive information. OUR CULTURE We’re a fully remote team of around 25 people distributed across the UK, Armenia, Italy, the US, Estonia, India, and beyond. We believe great talent is everywhere! * Our values are our north star: We Grow Together, We Win Together. Excellence Builds Relationships. Trust Is Our Currency. Results Matter, but People Create Them. * Connected, even remotely: We invest intentionally in staying connected through regular all-hands, 1:1s, technical reviews, and informal coffee chats, so collaboration feels natural and human despite the distance. * High ownership, real impact: Everyone contributes directly to customer-facing IP. Your work doesn’t disappear into layers of management – it ships. * How we work: We move fast but thoughtfully, communicate openly, and balance autonomy with support. Technical decisions are debated openly and grounded in data, trade-offs, and first-principles thinking. WHY JOIN US * Remote-first flexibility – work from anywhere, with flexible hours * Equipment & setup – we’ll provide the tools you need to succeed * High-impact projects – design real analog IP used in customer silicon * Supportive team culture – a dedicated manager and a team of colleagues ready to help * Competitive, transparent compensation – adjusted for your location and engagement model * Learning & growth – AI–DLP sessions, technical deep dives, and peer-led knowledge sharing that build both technical depth and system-level perspective RECRUITMENT PROCESS 1. Founder Call (30 min) – mutual introduction and interest alignment 2. Technical Interview (60 min) – fundamentals, reasoning, and problem-solving 3. Presentation (45 min) – short presentation on a topic of your choice, to assess clarity, structure, and confidence in presenting your work 4. HR & Culture Call (45 min) – values, collaboration style, and ways of working 5. Offer & Next Steps (30 min) – offer walkthrough, alignment on details, and next steps, discussed in a final call with the founder. If you don’t meet every requirement but feel excited about the role, apply anyway. We value curiosity, integrity, and potential as much as experience.

Responsibilities

The engineer will own layout execution from planning through tape-out, collaborating closely with analog designers to ensure performance and manufacturability across advanced technology nodes. Key tasks include physical design activities like synthesis, PnR, timing closure, and developing innovative techniques for power, performance, and area improvement.