Physical Design Engineer
at SVENTL ASIA PACIFIC PTE LTD
Singapore, Southeast, Singapore -
| Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
|---|---|---|---|---|---|---|---|
| Immediate | 08 Nov, 2024 | USD 6000 Monthly | 09 Aug, 2024 | N/A | Good communication skills | No | No |
Required Visa Status:
| Citizen | GC |
| US Citizen | Student Visa |
| H1B | CPT |
| OPT | H4 Spouse of H1B |
| GC Green Card |
Employment Type:
| Full Time | Part Time |
| Permanent | Independent - 1099 |
| Contract – W2 | C2H Independent |
| C2H W2 | Contract – Corp 2 Corp |
| Contract to Hire – Corp 2 Corp |
Description:
MANDATORY EDA SKILLS
- PnR tools such as Synopsys ICC/ICC2 and/or Cadence Innovus
Responsibilities:
Netlist to GDSII at block level, Subsystem Level and at Full chip.
- Worked on multiple tapeouts on Netlist to GDSII
- Hierarchical partitioning and budgeting of block-level subsystems.
- Implementation of high performance (HP) cores, low power designs
- Node experience upto 7nm, 10nm, 14nm, 28nm.
- Timing Signoff in loop through STA and ECO cycle at block and at interface.
- Block level floor planning, power planning and IR drop analysis.
- Scan chain reordering / Scan Chain repartitioning
- CTS expertise and clock tree constraints creation for meeting specifications
- MMMC optimization at Block and Sub-System Level
- Timing closure with Crosstalk and AOCV / POCV
- TCL scripting to fundamentally understand tool usage.
REQUIREMENT SUMMARY
Min:N/AMax:5.0 year(s)
Information Technology/IT
IT Software - Other
Information Technology
Graduate
Proficient
1
Singapore, Singapore
