Physical Design Engineer with RTL Design Background at Texas Instruments

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

24 Aug, 26

Salary

0.0

Posted On

26 May, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Physical Design, RTL Design, Logic Synthesis, Floorplanning, Clock Tree Synthesis, Static Timing Analysis, Physical Verification, Tcl, Perl, Python, Cadence Innovus, Cadence Tempus, Cadence Voltus, DRC/LVS, PPA Optimization, VLSI

Industry

Semiconductor Manufacturing

Description

About TI Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world’s brightest minds, TI creates innovations that shape the future of technology. TI is helping about 100,000 customers transform the future, today. We’re committed to building a better future – from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us – change the world, love your job! About the Role: Are you looking for a career at one of the leading semiconductor companies in the world Texas Instruments (TI) is looking for a Physical design engineer to join the team of enthusiastic engineers who develops highly complex mixed signal devices for audio applications with industry leading performance. We are seeking a skilled Digital Physical Design Engineer of 2-5 Year of industry experience with good RTL design hands-on and understanding. The candidate will be responsible for taking RTL through synthesis, floorplanning, place-and-route, timing closure, power optimization, and physical verification to tape-out. This role demands hands-on expertise in EDA tools, physical design flows, and deep knowledge of digital VLSI concepts. Key Responsibilities: * Execute RTL-to-GDSII physical design flow for complex SoC/ASIC blocks. * Perform logic synthesis, floor-planning, placement, clock tree synthesis (CTS), and routing. * Develop/support/update design constraints. * Drive timing closure across multiple corners and modes using static timing analysis (STA). * Good understanding of digital timing analysis * Optimize for area, power, and performance (PPA) at block and chip level. * Conduct physical verification: DRC, LVS, Antenna checks, IR-drop, and EM analysis. * Develop/support/update constraints. * Collaborate with RTL design, verification, and architecture teams to resolve design and implementation issues. * Provide EDA flow automation support (scripting in TCL/Perl/Python). * Contribute to design reviews, documentation, and sign-off processes for successful tape-out. * Highly prefer if additionally able to handle RTL coding, Digital QC(RDC/CDC/Lint). Contribute to digital design reviews and Arch reviews. Why TI? * Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. * We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI [https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012] * Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. About Texas Instruments Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com [https://www.ti.com/]. Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. If you are interested in this position, please apply to this requisition. TI does not make recruiting or hiring decisions based on citizenship, immigration status or national origin. However, if TI determines that information access or export control restrictions based upon applicable laws and regulations would prohibit you from working in this position without first obtaining an export license, TI expressly reserves the right not to seek such a license for you and either offer you a different position that does not require an export license or decline to move forward with your employment.

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Responsibilities

Execute the RTL-to-GDSII physical design flow for complex SoC/ASIC blocks, including synthesis, floorplanning, and routing. Drive timing closure and physical verification to ensure successful tape-out while optimizing for area, power, and performance.