PMTS Silicon Design Engineer

at  Advanced Micro Devices Inc

THE PERSON:

We are looking for a meticulous and motivated engineer with strong leadership to join and head the validation teams.

PREFERRED EXPERIENCE:

• Experience in high speed IO SerDes post-silicon validation.
• In-depth knowledge of the latest industry standards such as PCIe, Display Port, JESD, SDI, OIF-CEI-11G/25G/56G/112G-VSR/SR/MR/LR, IEEE 802.3 KR/CR/CAUI/GAUI etc.
• Strong programming/scripting skills coding languages such as Python, C/C++, TCL for firmware development, test methodology development and test automation
• Extensive experience with common lab equipment, including BERT, analyzers, oscilloscopes, PNA/VNA etc
• Knowledge of SerDes general architectures and link level system analysis
• Experience in system level serial link analysis and simulation, system performance optimization and standard/architecture level study using tools such as Matlab, ADS etc.

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
Responsibilities:

THE ROLE:

To define, validate and characterize the most cut edge SerDes design including PMA4 224G transceiver on the most advance technology node. Using the latest measuring equipment the semiconductor industry has to offer to benchmark AMD’s SerDes against the challenging industry standard.

KEY RESPONSIBILITIES:

• Post Silicon Validation of high speed SerDes
• Understand the industry requirements and specification for high speed IO
• Develop validation methodology to validate new industry standard and requirements.
• Characterize the latest SerDes design
• SerDes debug with designers on Silicon
• Tuned the latest design to performance at the most optimum setting
• Generate specification base on measured results
• Work with remote teams to co-ordinate distributed task.
• Support FAE on customer’s issues relating to high Speed IOs