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Power & Signal Integrity Engineer at Ralliant
Cleveland, Ohio, United States -
Full Time

Start Date

Immediate

Expiry Date

22 Feb, 26

Salary

0.0

Posted On

24 Nov, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

Power Integrity, Signal Integrity, PCB Layout, Simulation Tools, DFM Guidelines, High Speed Interconnect, Transmission Line Theory, Crosstalk, 3D Modeling, Behavioral IO Models, Equalization Techniques, Link Timing Budgeting, Field Solvers, Fabrication Process, Communication Skills, Team Collaboration

Industry

Electrical Equipment Manufacturing

Description
Bachelor's Degree in Electrical or Computer Engineering Good written and oral communication skills Ability to work with internal and external teams across multiple time zones Experience with PCB layout routing, placement, checking, and output generation Experience with PCB layout simulation tools Knowledge of ODB++, IDX, Valor DFM, Fabrication/Assembly process Understanding of AC/DC power integrity and power delivery analysis Familiarity with PCIE and DDR4/5 routing Experience designing and simulating high speed interconnect Knowledge of stackup design considerations Good understanding of DFM guidelines Knowledge of different simulation methodologies, time domain and statistical Ability to create and simulate 3D models in tools like HFSS, SIWave and PowerSI Understanding of behavioral IO models (IBIS, IBIS-AMI) Understanding of different equalization techniques, CTLE, DFE and TX equalization Familiarity with link timing budgeting Experience in transmission line theory and crosstalk. Proficiency in field solvers such as HFSS, Q3D, Sentinel-PSI, and Clarity, and SPICE transient simulation (ADS, Hspice), including use of IBIS and IBIS AMI models. Xpedition Layout/Designer/HyperLynx (PI/SI/DRC)/Valydate and Valor NPI
Responsibilities
The Power & Signal Integrity Engineer will be responsible for ensuring the integrity of power and signal delivery in high-speed PCB designs. This role involves collaboration with internal and external teams to optimize PCB layout and simulation methodologies.