Pre and Post Silicon Validation Engineer at Intel - Dubai

, , India -

Full Time

Start Date

Immediate

Expiry Date

27 Apr, 26

Salary

0.0

Posted On

27 Jan, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Post-Silicon Validation, Cache, Coherency, GPU, PCIe, Debugging, C/C++, Python, Linux, Architecture, Firmware, Platform, Mentoring, Collaboration, Analytical Skills, Automation, Characterization

Industry

Semiconductor Manufacturing

Description

Job Details: Job Description: Be part of Intel's AI Group and help shape the silicon behind Intel's most advanced AI platforms. In this role, you will part of a team leading post-silicon validation of the latest, cutting-edge GPU, Cache, PCIe technologies in complex AI SoCs. You will tackle the most challenging silicon issues, define and drive validation strategy, and work closely with architecture, design, firmware, and platform teams to deliver robust, high-performance, production-ready silicon. Key Responsibilities : Lead post-silicon validation for one of following domains in AI accelerators and SoCs: Cache, Coherency, GPU, PCIe. Define validation strategy, coverage, and debug methodology across multiple high-speed interfaces. Mentor and provide technical guidance to junior and mid-level validation engineers. Execute pre-silicon and post-silicon validation, drive first power-on, bring-up, characterization, and production readiness activities. Debug complex, system-level issues spanning protocol, firmware, electrical, and platform layers. Develop and review validation tests, automation, and debug tools (primarily C/C++). Collaborate with architecture, design, firmware and platform teams to influence design robustness and future architectures. Represent validation in cross-functional reviews and silicon readiness milestones. Qualifications: BTech /MTech in Computer Engineering, Electronics Engineering, or related field with 7+ years of relative experience. Strong understanding of Cache, Coherency, CPU and PCIe architecture and specifications. Pre/Post-silicon Validation experience to Cache blocks, coherence, UMA/NUMA memory, PCIe with excellent analytical and debug skills. Expertise in debugging memory coherency, PCIe, GPU and memory specific Bugs Linux system /User mode programming. Good exposure on Zebu, Palladium, emulation platform for validation and debugs. Knowledge on C, C++, Python, and linux tool chain. Knowledge in Intel/ARM based AI platform architecture and debug tools/frameworks. Motivated, Self learner with excellent communication and collaboration skills Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. Intel’s official careers website. Find your next job and take on projects that shape tomorrow’s technology. Benefits Internships Life at Intel Locations Recruitment Process Discover your place in our world-changing work.

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Responsibilities

Lead post-silicon validation for AI accelerators and SoCs, defining validation strategy and driving first power-on and production readiness activities. Collaborate with cross-functional teams to influence design robustness and debug complex system-level issues.