Job ID 2025-15613
Date posted Aug. 29, 2025
Location Austin, Texas
Category Hardware Engineering
The Principal DFT Architect within Arm’s Solutions Engineering Group DFT team plays a crucial role in implementing Design for Test (DFT) strategies for Systems on Chip (SoCs) across various sectors, including client, datacenter, automotive, and IoT. Demonstrating the latest DFT and process technologies, the team works in close partnership with both Arm’s external partners and internal teams—spanning RTL, verification, physical implementation, and test engineering—throughout all phases of a project, from the initial investigation to tape-out, as well as silicon testing and characterization on Automatic Test Equipment (ATE).

Responsibilities:

• Architect DFT solutions for SoCs that serve multiple lines of business.
• Coordinate DFT requirements with SOC, IP, and product teams to ensure alignment and integration.
• Implement and validate innovative DFT techniques on both SoCs and sub-systems.
• Insert DFT logic at both the SoC and sub-system levels, validating all DFT features using industry-standard simulation tools.
• Collaborate closely with multi-functional teams to support DFT RTL-level insertion, synthesis, scan insertion, place-and-route, static timing analysis, and timing closure.
• Chip in to the development of ATE-targeted test patterns, validation processes, and silicon debug activities.
• Work alongside test and product engineering teams to support silicon characterization and validation efforts!

Required Skills and Experience :

• Shown experience as a DFT Architect, with at least 15 years in Design for Test methodologies.
• Demonstrated ability handling DFT architecture for complex SoCs in advanced technology nodes.
• Expertise in critical DFT areas, which may include Siemens DFT tools, Streaming Scan Network (SSN), scan compression and insertion, memory BIST and repair scheme implementation, logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, DFT mode timing constraints, back-annotated gate-level verification, silicon debug, and memory and scan diagnostics.
• Experience in 2.5D and 3D test methodologies.
• Proficiency in coding with Verilog RTL, and scripting languages such as TCL and/or Perl.

“Nice To Have” Skills and Experience :

• Familiarity with SoC architectures, particularly those featuring multi-clock domains and low-power design practices.
• Understanding of Arm IP, including Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, and CoreSight debug solutions.
• Background in high-performance design, implementation, and achieving timing convergence.
• Experience in leading datacenter SoC projects.
• Hands-on experience with DFT or equivalent experience and simulation tools from Cadence and/or Synopsys.
• Communicates effectively across teams and locations in different geographies and time zones.
• Possesses strong analytical and debugging skills, with a proactive, problem-solving mentality.

Salary Range:
$241,100-$326,100 per year
We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm’s offering. The total reward package will be shared with candidates during the recruitment and selection process.
Accommodations at Arm
At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.
Hybrid Working at Arm
Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.
Equal Opportunities at Arm
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran

• Architect DFT solutions for SoCs that serve multiple lines of business.
• Coordinate DFT requirements with SOC, IP, and product teams to ensure alignment and integration.
• Implement and validate innovative DFT techniques on both SoCs and sub-systems.
• Insert DFT logic at both the SoC and sub-system levels, validating all DFT features using industry-standard simulation tools.
• Collaborate closely with multi-functional teams to support DFT RTL-level insertion, synthesis, scan insertion, place-and-route, static timing analysis, and timing closure.
• Chip in to the development of ATE-targeted test patterns, validation processes, and silicon debug activities.
• Work alongside test and product engineering teams to support silicon characterization and validation efforts