Principal Engineer, ASIC Development Engineering at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

30 Apr, 26

Salary

0.0

Posted On

30 Jan, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

C, System Verilog, UVM, Verification Methodology, Test Plans, Test Benches, Debugging, Problem Solving, Bus Protocols, Programming, Scripting, Gate-Level Simulations, Functional Coverage, Interfaces, Test Development, Test Coverage Assessment

Industry

Semiconductor Manufacturing

Description

Job Description The SoC Development team is seeking highly motivated engineers to join a team of experienced engineers working on the development of controller SoCs. As a Verification Engineer in SoC Development Team, you will develop test-plans and tests for use in testing complex hardware in System On Chip (SoC) ASIC’s. Your work will enable industry-leading data storage control SoC’s that get deployed into high volume consumer and enterprise products. The growing diversity of data creates an exponential number of new possibilities – for the world, our company and you. You’ll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We’ve only started to scratch the surface of what data can do. You can help unlock its full potential. ESSENTIAL DUTIES AND RESPONSIBILITIES: Responsible for driving verification strategy, creating Test Plans, and developing Test Benches for SoC. Collaborate with architects, designers, pre-and post-silicon verification teams to develop test plans Responsible to develop C-based tests on SoC. Processor knowledge is a plus. Define and meet all functional coverage goals Run and debug gate-level simulations Understanding and generation of functional patterns for ATE Qualifications REQUIRED: BE or MS degree in Electrical Engineering or Computer Engineering, with 9-13 years of experience Deep understanding of C, System Verilog UVM and coverage driven verification methodology History of building and improving UVM based verification methodology SKILLS: Develop and execute verification plans Proficiency with C, Verilog & System Verilog and verification Experience in implementing advanced test benches, verification models, scoreboards/checkers. Knowledge in bus protocols - APB, AHB, AXI, and bus interconnects Good Programming/Scripting skills with languages such as Python, Perl, TCL, and BASH Experience with test plan creation and test-bench development Experience with test development and test coverage assessment Excellent debugging and problem-solving skill Knowledge in various interfaces – PCIe, DP, UART, I2C, I2S, SPI, USB, SD Create and modify SoC-level, and sub-system level test benches. Experience in setting up and running gate-level simulations Gate Level / Power-Aware simulations Great written and verbal communication skills Interest in ASICs, SoCs, hard disk drives, flash memory, semiconductor components Strong team player who can collaborate with colleagues Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying Business Function: ASIC Development Engineering Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

The Principal Engineer will drive verification strategy, create test plans, and develop test benches for SoC. Collaboration with architects, designers, and verification teams is essential to ensure comprehensive testing of complex hardware.