Principal Engineer, ASIC Development Engineering (Test Automation) at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

28 Jan, 26

Salary

0.0

Posted On

30 Oct, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SystemVerilog UVM, Verification Methodologies, Python, TCL, PERL, Linux, Unix, Shell Scripting, Debugging, Problem-Solving, Cross-Functional Collaboration, Team Player, Emulation Platforms, HW/SW Co-Debug, Testplan Creation, Testbench Architecture

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description The ASIC emulation team is seeking highly motivated engineer to join a team of experienced engineers working on the development of advanced controller SoCs. As a Principle Emulation Engineer in the ASIC Emulation team, you will be responsible for enabling new emulation & verification technology for the larger ASIC team. This includes traditional verification technology that is now being accelerated by GenAI and accelerating verification of DFT and UPF with emulation. This unique position requires a mix of verification and emulation skills. The growing diversity of data creates an exponential number of new possibilities – for the world, our company, and you. You’ll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We’ve only started to scratch the surface of what data can do. You can help unlock its full potential. Essential Duties and Responsibilities · Providing technical leadership and expertise to define requirements for Emulation and Emulation IP development. · Partnering with ASIC engineers to deploy new technologies like emulation acceleration, advanced verification environment configuration and management, and AI technology for verification and emulation. · Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for DFT and UPF emulation acceleration. · Collaborating cross-functionally to optimize verification and emulation workflows and standardize methodologies. · Work with extended teams to debug environment and drive cross-functional testing (Firmware, Software, Verification and Design) · Triage failures with design, verification, firmware, software teams · Mentoring and guiding junior engineers, fostering a culture of collaboration, innovation and continuous improvement. Skills: · Proficiency with SystemVerilog UVM and advanced verification methodologies. · Programming and automation skills in Python, TCL and PERL · Working knowledge of Linux/Unix environment and shell scripting · Excellent debugging and problem-solving skills with simulation and emulation environments. · Cross-Functional Collaboration: Ability to work closely with design, validation, firmware, and physical design teams to resolve system-level issues. · Strong team player, able to collaborate effectively across architecture, design, and validation teams. Qualifications Required: · BE or MS degree in Electrical Engineering or Computer Engineering, with 13+ years of experience. · Solid experience working on emulation platforms such as Veloce, Zebu, or Palladium (compilation, debug, performance, and throughput tuning) · Debugging experience is a must particularly in HW/SW co-debug environments · Understanding of System Verilog UVM and verification methodologies especially testplan creation and constructs of testbench architecture. Able to debug problems between verification and emulation. Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Responsibilities

The Principal Engineer will provide technical leadership for Emulation and Emulation IP development while collaborating with ASIC engineers to deploy new technologies. This role involves optimizing verification and emulation workflows and mentoring junior engineers.