Principal Engineer, ASIC Verification Engineering at Sandisk

Zhubei City, , Taiwan -

Full Time

Start Date

Immediate

Expiry Date

24 Sep, 26

Salary

0.0

Posted On

26 Jun, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SystemVerilog, UVM, ASIC Verification, Verilog, VHDL, Synopsys VCS, Cadence Xcelium, Formal Verification, Digital Logic Design, Computer Architecture, CPU Verification, GPU Verification, NPU Verification, HBM Verification, PCIe Verification, Debugging

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description We are seeking a highly skilled ASIC Verification Engineer to join our team in Chupei, Taiwan. In this role, you will be responsible for developing and implementing comprehensive verification strategies for complex ASIC designs, ensuring the highest quality and reliability of our semiconductor products. Develop and execute verification plans for complex ASIC designs Create and maintain testbenches using SystemVerilog and UVM Design and implement efficient verification environments Perform functional and formal verification of digital designs Develop automated test scripts to improve verification efficiency Analyze and debug design issues identified during verification Collaborate with design engineers to resolve functional discrepancies Generate detailed verification reports and documentation Stay updated with industry trends and emerging verification methodologies Contribute to the continuous improvement of verification processes and tools Qualifications Master's degree in Electrical Engineering, Computer Engineering, or related field 5+ years of experience in ASIC verification with strong proficiency in SystemVerilog and UVM Experience with Verilog, VHDL, and industry-standard simulation tools (e.g., Synopsys VCS, Cadence Xcelium) Experience in CPU, GPU, NPU, HBM or PCIe verification Knowledge of formal verification techniques and tools Strong debugging, problem-solving, and analytical skills with solid understanding of digital logic design and computer architecture Excellent communication and teamwork skills in a fast-paced environment Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Business Function: ASIC Development Engineering Work Location: Tai Yuen Office--LOC_HGST_STEC-TW

Responsibilities

Develop and implement comprehensive verification strategies and testbenches for complex ASIC designs using SystemVerilog and UVM. Collaborate with design engineers to debug functional issues and improve verification processes and tools.