Sign up with

Already have an account? Log in here

Need some help?
Talk to us at +91 7670800001

PRINCIPAL ENGINEER - DEMQRA WLR at Micron Technology

Hyderabad, Telangana, India -

Full Time

Start Date

Immediate

Expiry Date

18 Mar, 26

Salary

0.0

Posted On

18 Dec, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Wafer Level Reliability Testing, Package Level Reliability Testing, Failure Analysis, Risk Assessment, Process Reliability Tests, Statistical Quality Control, Data Analysis, Problem Solving, CMOS Device Engineering, Process Integration, Semiconductor Characterization, Intrinsic Semiconductor Reliability, Failure Mechanisms, Statistical Concepts, Technology Development, Excursion Material Disposition

Industry

Semiconductor Manufacturing

Description

Wafer Level & Package Level Reliability testing & analysis for CMOS & Interconnects. Comprehend failure modes and failure rate within the scope of the product qualification. Perform risk assessment at all decision points within qualification cycle. Provide WLR support for HVM Fab Process conversion & Excursion material disposition. Collaborate with Technology Development for new technology node deployment. Develop process reliability tests to assess new process failure mechanisms. Ensure that test methodology follows industry standards, such as the Joint Electron Devices Engineering Council (JEDEC). Experience in handling Package Level / Wafer Level Reliability Systems or Parametric analyzers or Semiconductor characterization. Strong background in Intrinsic Semiconductor Reliability Failure Mechanisms and product fail modes. Familiarity with statistical concepts relevant to semiconductor reliability. Good understanding of CMOS Device Engineering, process integration and Statistical Quality Control. Excellent data analysis and problem solving skills. Bachelor's with 10+ years experience or Masters with 7+ experience or PhD with 5+ years experience Area of Specialization: Electrical Engineering / Microelectronics / Nanotechnology / Material Science Engineering/Reliability Engineering.

Responsibilities

The principal engineer will conduct wafer and package level reliability testing and analysis for CMOS and interconnects, while comprehending failure modes and rates during product qualification. They will also provide support for high-volume manufacturing fab process conversion and collaborate with technology development for new technology node deployment.