Start Date
Immediate
Expiry Date
13 Sep, 26
Salary
0.0
Posted On
15 Jun, 26
Experience
10 year(s) or above
Remote Job
Yes
Telecommute
Yes
Sponsor Visa
No
Skills
Design For Test, Scan, ATPG, Memory BIST, Boundary Scan, Tessent Siemens, JTAG, IJTAG, Verilog, SystemVerilog, Python, Perl, SoC Design, Hierarchical DFT, Test Pattern Development, Post Silicon Bring Up
Industry
Semiconductor Manufacturing