Principal Engineer Physical Design (f/m/div) at Infineon Technologies AG Australia

Villach, Carinthia, Austria -

Full Time

Start Date

Immediate

Expiry Date

11 Mar, 26

Salary

0.0

Posted On

11 Dec, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Physical Design, Technical Leadership, Synthesis, Place & Route, Timing Closure, Verification, RTL2GDS, EDA Tools, Programming Skills, Scripting Languages, Analytical Thinking, Solution-Oriented Thinking, Team-Oriented, Continuous Improvement, Communication Skills, Stakeholder Management

Industry

Semiconductor Manufacturing

Description

#WeAreIn for jobs that impact everyone's life. Build the future nobody’s dreamed of yet... are you ready to rethink the impossible? As a Principal Engineer Physical Design on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving ground breaking projects, and bringing new ideas to life. Are you in? Your Role In your new role you will: Take over the technical leadership for the physical design of complex digital IPs, Subsystems, Clusters and SOCs Ensure Implementation according to customer and internal requirements using state-of-the-art EDA tools and flows Have the Responsibility for complete steps in RTL2GDS flow, such as Synthesis, P&R (Floorplan, Power- Routing, Placement, Clock Tree Design, Routing), and efficient Sign Off for Physical Verification, EMIR, Equivalence Check, and Static Timing Analysis Implement solutions to the various challenges in designing IPs/SBs/Clusters/SOCs in leading-edge technologies Contribute to methodology developments with proposals and implementation of flow and methodology enhancements Your Profile You live up to high-quality standards, strive for continuous improvement, and develop and implement effective solutions. As a true team player, you cooperate across boundaries and contribute with your hands-on and driver mentality. You focus on and listen to the stakeholders and consider their position to balance the requirements and interests. Finally, you are able to handle abstract matters and communicate complex topics in a condensed manner. Qualifications and skills to help you succeed: A degree in Electrical Engineering, Microelectronics, Physics, or a similar field More than 10 years of relevant experience in Physical Design - with experience in Synthesis, Place & Route, Timing Closure and Verification Profound RTL2GDS knowledge in state-of-the-art tool chain for Synopsys, Cadence, Ansys and Mentor Insights into technical leadership in physical design projects Programming skills and knowledge in scripting languages like Tcl, Perl, or Python Deep technical understanding in all aspects of RTL2GDS and basic knowledge in RTL Design Team-oriented and structured working style Strong analytical and solution- oriented thinking Fluent English language skills – with German being an added plus We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group I (https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills. Contact: Mag. Stefanie Triebelnig, BA, LinkedIn #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels. We look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

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Responsibilities

The Principal Engineer will lead the physical design of complex digital IPs and ensure implementation according to requirements using EDA tools. Responsibilities include managing the RTL2GDS flow and contributing to methodology developments.