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Principal Engineer, Process Integration at Micron Technology
Taichung, , Taiwan -
Full Time

Start Date

Immediate

Expiry Date

11 Feb, 26

Salary

0.0

Posted On

13 Nov, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

DRAM Process, HBM Process, DRAM/PKG Test Structure, Reliability Test Flow, Fail Mechanism, PKG Layout Design Rule, JMP, Yield Cube, MobaXterm, Klarity, Klayout, SPC

Industry

Semiconductor Manufacturing

Description
1. DRAM process/structure 2. HBM process/structure 3. 4. 5. DRAM/PKG test structure/program 6. Reliability test flow/condition, fail mechanism. 7. PKG layout design rule 1. JMP 2. Yield cube 3 3. MobaXterm 4. Klarity 5. Klayout 6. SPC
Responsibilities
The Principal Engineer will focus on DRAM and HBM processes and structures, as well as reliability testing and package layout design rules. The role involves developing test structures and programs for DRAM and PKG, along with analyzing failure mechanisms.