Principal Engineer SOC STA Lead at Infineon Technologies AG Australia
Bengaluru, karnataka, India -
Full Time


Start Date

Immediate

Expiry Date

12 Feb, 26

Salary

0.0

Posted On

14 Nov, 25

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

STA, Timing Closure, SoCs, Physical Design, Timing Analysis, Low-Power Synthesis, Equivalence Checks, Scripting Languages, Shell, Perl, Tcl, Make Flow, VLSI Design, Timing Signoff, Detail Oriented, Methodical

Industry

Semiconductor Manufacturing

Description
Responsible for leading STA and Timing Closure of complex, low power SoCs targeted for IOT and MCU markets. Work closely with physical design team for timing/SI closure B.Tech or M.Tech relevant work experience and specialization in VLSI design. Strong hands-on technical experience in constraints development, timing analysis/closure of SoCs. Experience in low-power synthesis and equivalence checks will be a plus. Expert user of industry standard tools for timing signoff. Experience in scripting languages (shell, perl, tcl) and Make flow. Must be well organized, methodical and detail oriented. We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.

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Responsibilities
Responsible for leading STA and Timing Closure of complex, low power SoCs targeted for IOT and MCU markets. Work closely with physical design team for timing/SI closure.
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