Principal Layout Engineer at NXP Semiconductors

Catania, Sicily, Italy -

Full Time

Start Date

Immediate

Expiry Date

09 Aug, 26

Salary

0.0

Posted On

11 May, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Analog Layout, Physical Design, RF Components, Cadence Virtuoso, Siemens Calibre, DRC/LVS Verification, Device Physics, ESD/Latch-up, Signal Chain Layout, Power Design Layout, Team Leadership, Process Node Management, Physical Modeling, Automation Scripting, Analog Design Integration, Silicon Debugging

Industry

Semiconductor Manufacturing

Description

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics. NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace. This team will include all key engineering disciplines in Design, Architecture, Verification, DfT and Physical Design to produce high performance and quality products. Working in a fast-paced consumer environment, we are looking for an outstanding lead for our Analog Layout team. This team will include support for MCU and for analog custom products being designed both in Catania but also globally. Your Responsibilities Lead a team of analog layout engineers responsible for the physical design of analog blocks and systems Responsible for layout of Analog and RF components in MCU, NFC UWB and BT/BLE products Work across multiple process nodes and foundries (140nm to 16 nm, CMOS, BCD, FD-SOI, FinFET … ) Develop the expertise of the team and drive innovation Provide accurate estimates on area, performance and timeline Drive the team to meet aggressive schedules without sacrificing quality Work closely with analog design engineers to ensure seamless integration of layout and design Ensure layouts meet performance, power, and area requirements Develop and maintain layout scripts and automation tools Collaborate with cross-functional teams, including digital layout, design and verification Perform layout verification (DRC, LVS … ) and sign-off Deliver physical models (LEF, Libs) to subsystem and IC teams for integration Your Profile MSEE/BSEE or working equivalent 10 years’ experience in the layout of analog blocks and systems Experience with leading a global team of engineers Proven track record in delivering working silicon for high volume products Solid fundamentals of transistor level integrated circuits and device physics. Knowledge of layout matching and parasitics, latch-up, ESD, etc. Rigorous and methodical with good analytical skills for debugging issues in design and on silicon Proficiency in analog layout tools, such as Cadence Virtuoso, Siemens Calibre .. Knowledge of ESD/Latch up fundamentals Experience with signal chain and power design layouts More information about NXP in Italy... #LI-7795 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills. Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. Thank you for considering a career at NXP. To help you prepare for the different steps in our hiring process, see the following useful advice and tips. Are you already an NXP employee? Do not apply here. Instead, you must apply via our internal career page. Thank you for your interest in supporting our recruitment efforts. Please note that NXP operates under a strict Preferred Supplier List (PSL) for all recruitment activities. Any candidate profiles or resume submitted without a prior written agreement or explicit request from our Talent Acquisition team will be considered unsolicited. Such submissions will be deemed free of any obligations, and no fees will be paid by NXP or any of its affiliates, subsidiaries, or divisions - regardless of whether the candidate is hired, either coincidentally or otherwise. Thank you for your understanding.

Responsibilities

Lead a team of analog layout engineers in the physical design of analog and RF components for MCU, NFC, UWB, and BT/BLE products. Coordinate across multiple process nodes and collaborate with analog design engineers to ensure seamless integration and sign-off.