Principal Memory Design Engineer at Micron Technology

Atlanta, Georgia, United States -

Full Time

Start Date

Immediate

Expiry Date

05 Feb, 26

Salary

0.0

Posted On

07 Nov, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

CMOS Circuit Design, VLSI, Analog Circuit Design, Cadence Virtuoso, Physical Layout, Circuit Floor Planning, FINESIM, HSPICE, VERILOG, Device Reliability, DRAM Sub-system Architecture, Technical Project Leadership, Problem-solving, Communication, Interpersonal Skills, Innovation

Industry

Semiconductor Manufacturing

Description

Contribute to the Design and Layout of New Memory Products Implement device specifications and develop circuit solutions. Design digital and analog circuits using CMOS logic gates and transistors. Design memory core circuits and optimize for sense margins, array timings, and die size. Prepare design documentation for other engineers. Analyze circuits for power consumption, speed performance, and reliability. Assist with design validation, reticle experiments, and necessary tape-out revisions. Lead design and layout resource allocations. Serve as the point of contact for design, layout, verification, and testing issues. Monitor progress and track tasks. Prepare project status reports for upper management. Plan and hold design reviews to discuss project progress and decisions. Contribute to cross group communication to work towards standardization and group success Aid in design documentation and communicating best known practices to entire department Participate in continuing education and competitor analysis Proactively solicit feedback from Standards, CAD, modeling, and verification groups to ensure the design quality Drive innovation into the future Memory generations within a dynamic work environment 7+ years of experience in the Semiconductor industry to include the following: Bachelor's degree or equivalent experience in Computer or Electrical Engineering CMOS Circuit Design, VLSI, and Analog Circuit Design Knowledge and experience using Cadence Virtuoso Understanding Physical Layout & Circuit Floor Planning Experience simulating with FINESIM, HSPICE and VERILOG Comprehensive understanding of Device Reliability Expertise in DRAM sub-system architecture, specification, operation, or design Experience leading technical projects across departments Master's Degree or PhD in Electrical or Computer Engineering Excellent problem-solving and analytical skills Self-motivated with strong problem-solving skills and an interest in discovering new solutions In-depth knowledge of industry-specific technologies and trends in Storage/Memory Excellent communication and interpersonal skills 5+ years of proven ability in DRAM design, product, or system.

Responsibilities

The Principal Memory Design Engineer will contribute to the design and layout of new memory products, implementing device specifications and developing circuit solutions. They will lead design and layout resource allocations and serve as the point of contact for design, layout, verification, and testing issues.