Principal/Senior Engineer, APTD CEM - Advanced Packaging Wafer Level Techno at Micron Technology

, , Singapore -

Full Time

Start Date

Immediate

Expiry Date

09 Apr, 26

Salary

0.0

Posted On

09 Jan, 26

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Process Development, Wafer Thinning, Backside Metal Interconnect, Statistical Analysis, Process Modeling, Data Analytics, Automation, Tool Integration, Fault Detection, Recipe Management, Defect Analysis, Process Flows, Problem Solving, Root Cause Analysis, Collaboration, Technology Development

Industry

Semiconductor Manufacturing

Description

Your responsibilities include but are not limited to developing and enabling deployment of processes related to the post-fab wafer finishing processes in semiconductor manufacturing to meet performance, cost, manufacturability, quality, reliability and schedule requirements. Process Development: Establish and improve Wafer level process conditions and technologies (wafer thinning, backside metal interconnect) Upgrade process capabilities and reduce production costs Establish and improve process management projects to deliver technology node requirements and scaling for next node. Evaluate and promote new equipment and materials to enhance process capabilities Set up process parameters for a variety of semiconductor equipment Evaluate, promote, and plan for new equipment and materials Ensure defense coverage through process, measurement, inspection, and testing Establish correlations between defense mechanisms to identify improvement opportunities Work closely with internal and external partners to build and execute technology development strategies aligned with organizational and business objectives Work closely with various teams, including the Package Integration, Assembly Engineering, Front End Wafer Fab, Assembly/Test Engineering, Product Engineering, and Global Quality, to integrate manufacturing processes for optimal performance and quality control Ensure smooth transition from new product development, qualification, small volume production to high volume production Provide Process Of Record (POR) and Model Of Record (MOR) documentation for product transfer to production High Volume Manufacturing Fabrication facilities B.S/M.S./Ph.D. (or equivalent education) in Chemical Engineering, Electrical Engineering, Mechanical Engineering, Physics, or other related technical fields 2 or more years of semiconductor process development, preferably in wafer bonding, plating, warpage control and packaging field Proficiency in Python, R, SQL for statistical analysis, process modeling, and data analytics. Experience with Visual Basic for automation and tool integration. Familiarity with E3, FDC (Fault Detection and Classification), and RMS (Recipe Management System) for equipment and process control. Strong data analytics capabilities to support SPC, DOE, defect analysis, and dashboarding. Strong understanding of process flows, process interactions, and how process changes can affect yield, performance, and reliability Tenacity to work effectively under timelines and limited resources Consistent track record to solve problems and address root causes

Responsibilities

Develop and enable deployment of processes related to post-fab wafer finishing in semiconductor manufacturing. Collaborate with various teams to integrate manufacturing processes for optimal performance and quality control.