Principal Silicon Photonics Packaging Engineer will be responsible for the packaging design and layout of advanced Co-Packaged Optics and Optical Engine products. This will include the packaging for Silicon Photonics, integration with various EIC, and optical connectors. They will need to work with packaging OSAT’s to bring CPO products from concept to production with good performance, yield, and reliability.

EDUCATION & EXPERIENCE

• Bachelor’s degree with 9 years of related experience in optical and IC packaging.
• Or Master’s degree with 7 years; or a PhD with 4 years experience.

SKILLS

• Expertise in advanced IC packaging design, FOWLP, RDL, bumping, flip-chip.
• Experience with high-speed differential and single ended impedance-controlled signal routing.
• Experience with Silicon Photonics IC packaging.
• Experience with organic substrate design and packaging.

PHYSICAL REQUIREMENTS

• Sitting for extended periods while working on a computer or conducting meetings.
• Use of hands and fingers for typing, writing, and handling documents.
• Occasional lifting of objects or materials up to 20 pounds for administrative tasks.
• Ability to communicate verbally and in writing.
• Mobility within the office environment to attend meetings or interact with colleagues.

SAFETY REQUIREMENTS

All employees are required to follow the site EHS procedures and Coherent Corp. Corporate EHS standards.

PRIMARY DUTIES & RESPONSIBILITIES

• Drive Co-Packaged Optics and Optical Engine product packaging activities from initial concept to production.
• Develop Silicon Photonic (PIC) and electronics IC (EIC) co-design process flow, PIC and EIC IO pad frame and 3D interposer floor plan.
• Lead PIC and EIC interconnect schematic and monitor layout design process.
• Work with OSAT’s to define PIC and EIC hybrid integration packaging design rules, process flow, and material sets.
• Lead optical package development to establish package manufacturability and reliability.
• Collaborate with cross-functional teams consisting of Silicon Photonics, IC design, substrate layout, and module design teams.

QUALITY AND ENVIRONMENTAL RESPONSIBILITIES

Depending on location, this position may be responsible for the execution and maintenance of the ISO 9000, 9001, 14001 and/or other applicable standards that may apply to the relevant roles and responsibilities within the Quality Management System and Environmental Management System.