Principal SoC Design Engineer at GlobalFoundries US Inc

Richardson, Texas, United States -

Full Time

Start Date

Immediate

Expiry Date

21 Aug, 26

Salary

265000.0

Posted On

23 May, 26

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

SystemVerilog, Verilog, SoC Design, RTL Implementation, AXI4/5, CHI, NoC Fabrics, RISC-V, ARM Cortex, Python, Tcl, Perl, ISO 26262 ASIL-D, Digital Design, Low-power Design, Synthesis

Industry

Semiconductor Manufacturing

Description

Principal Engineer SoC Design About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction: The Principal SoC Design Engineer provides deep technical expertise in developing high-performance data processing units and automotive microcontrollers with 8-10+ years of experience. This individual contributor role drives end-to-end SoC design—from architecture definition and micro-architecture specification to RTL implementation, optimization, and silicon-proven delivery—while advancing design methodologies for complex, safety-critical systems. Your Job: Lead gathering, analysis, and translation of complex subsystem, module, and SoC-level requirements into actionable micro-architecture specifications that meet stringent performance, power, and area targets. Architect and develop synthesizable RTL (SystemVerilog/Verilog) for high-performance IP modules, subsystems, and full SoC integrations, including custom data processing units and automotive MCU cores. Drive front-end design flow improvements, including automation of spec-to-RTL generation, IP reuse strategies, and advanced synthesis methodologies to boost team productivity and design quality. Perform detailed RTL design reviews, optimization for timing/power/area, and constraint development to ensure first-pass silicon success across advanced nodes. Champion design innovation by evaluating and integrating emerging standards, bus fabrics (AXI5/CHI, AMBA), and processor architectures (RISC-V, ARM Cortex) into production flows. Collaborate deeply with architecture, verification, physical design, DFT, and software teams to resolve multi-disciplinary issues, define interfaces, and align on system-level tradeoffs. Provide technical guidance through code reviews and knowledge sharing on best practices for maintainable, verifiable RTL. Analyze silicon bring-up results, debug field issues, and implement lessons learned to refine design methodologies and IP libraries. Other Responsibilities: Collaborate with cross-functional teams (Architecture, Verification, Physical Design, etc.) to identify and resolve design issues. Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering. 8-10+ years of hands-on experience in SoC/IP design for high-volume or safety-critical applications, including architecture-to-silicon delivery. Expert-level proficiency in synthesizable SystemVerilog/Verilog, with deep knowledge of advanced digital design techniques (pipelining, FSM optimization, low-power design). Strong command of SoC interconnects and protocols including AXI4/5, AHB, APB, CHI, and NoC fabrics. Proven track record of leading RTL development for complex blocks (processors, accelerators, peripherals) on advanced nodes (7nm and below). Proficiency in scripting (Python, Tcl, Perl) for RTL generation, automation, and design space exploration. Exceptional analytical, problem-solving, and debugging skills for resolving ambiguous, cross-domain challenges. Outstanding technical communication skills for presenting designs to stakeholders and documenting specifications. Preferred Qualifications: Experience with RISC-V, ARM Cortex-A/R/M-series, or MIPS architectures in automotive or embedded applications. Deep expertise in Functional Safety (ISO 26262 ASIL-D), including safety mechanisms, fault injection, and certification flows. Familiarity with register description languages (IP-XACT, SystemRDL) and UVM-based verification methodologies. Hands-on experience with high-performance data processing units (e.g., DSPs, AI accelerators, vision pipelines). Proven technical leadership in driving design methodology evolution and tool adoption (Synopsys DC, Genus, Verdi). GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. Expected Salary Range $153,000.00 - $265,000.00 The exact Salary will be determined based on qualifications, experience and location. If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address. An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations. GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory. All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law

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Responsibilities

Lead the end-to-end SoC design process from architecture definition and micro-architecture specification to RTL implementation and silicon delivery. Drive design methodology improvements and collaborate with cross-functional teams to optimize performance, power, and area for automotive and data processing units.