BACKGROUND TO THE ROLE

Within Tyndall’s research programme for Integrated Power Management for Energy-efficient high performance computing, we have developed world leading platform technologies for the heterogeneous integration of high-efficiency miniaturised passive components. These platform technologies are to be further developed and offered through the €1Billion Chips Joint Undertaking (JU) FAMES Pilot Line.
The FAMES Pilot Line is the result of a remarkable European cross-border collaboration. The consortium, led by CEA-Leti, Grenoble, France, is composed of 4 Hosting Sites (CEA-Leti, Tyndall, VTT Finland, and SAL Austria) and includes other research providers such as imec (Belgium), Fraunhofer (Germany), CEZAMAT WUT (Poland), universities including UC Louvain (Belgium), Grenoble INP (France), Universidad of Granada (Spain), and the European Association SiNANO. FAMES is co-funded for the period of 2024–2028 by the European Commission and national agencies as part of the targeted initiatives of the EU Chips Act.
With the goal of transferring results to the EU semiconductor industry, the FAMES Pilot Line will develop advanced technologies offering 2 generations of Fully-Depleted Silicon-on-Insulator (FD-SOI) at 10nm and 7nm nodes, addressing the surging demand for FD-SOI technology. This FD-SOI platform will be enhanced with integrated non-volatile memory, radiofrequency components, 3D options, and thin-film magnetic inductors to improve power management.
In FAMES, the development of Tyndall demonstrators will unlock the innovation potential of our technology platforms by enabling new applications (e.g., IoT and 6G) and creating additional demand by industry clients within the FD-SOI ecosystem. We will bring world-leading expertise, capabilities and international profile in integrated magnetics and power management to create miniaturised inductors and develop micro-transfer printing of power passives and PMICs (power management ICs). This will enable European companies to build their global competitiveness in Power Supply in Package (PSiP) and Power Supply on Chip (PwrSOC) with the ultimate goal of developing leadership in the area of integrated, granular power management on the FDSOI platform.

PURPOSE OF THE ROLE

This role is central to bridging research concepts with practical fabrication, ensuring that innovative ideas from the NanoIC program are successfully translated into robust device flows. As the Process Integration Engineer, you will be responsible for planning and executing end-to-end fabrication runs in Tyndall’s flexifab, using a variety of process modules and advanced metrology methods. By designing and running experiments, collecting and analyzing data, and iterating on process flows, you will help drive continuous improvements in device performance.
Although you will report into the SP&S group, you will work closely with researchers and domain experts within the NanoIC program who will guide much of the technical direction. Your hands-on approach in the cleanroom—coupled with thorough documentation of procedures and results—will be essential for turning cutting-edge research ideas into tangible outcomes. By proactively identifying and mitigating risks, you will also ensure that all process developments align with the highest standards of quality and safety.
Through collaboration and mentorship, you will play a key role in strengthening our research-to-fabrication pipeline. By training junior team members and sharing best practices, you will help build a culture of knowledge transfer and operational excellence. Ultimately, your work will have a direct impact on advancing semiconductor technology, as you push the boundaries of what is possible in device manufacturing and integration.

KEY DUTIES AND RESPONSIBILITIES

• Work with the supervisor and other team members to support the delivery of the outputs of the project
• Hands-on end-to-end fabrication of device runs in the Tyndall MEMS fab
• Setup and execution of DOEs for process and device optimization
• Implement in-line and end-of-line process metrology to monitor process performance
• Analyze data from experimental runs to provide data-driven recommendations for process improvements and modifications
• Collaborate closely with researchers and domain experts to translate ideas into practical fabrication flows
• Perform risk assessments of new flows or equipment integration
• Document process flows, recipes, and experimental results
• Report results in internal meetings
• Stay current with processing methods reported in the literature and apply them where applicable
• Provide process engineering support for tools specific to project (e.g., cleaning tools)
• Train and support junior engineers, interns or researchers on tool operation, safety protocols, and fabrication procedures
• Participate in Education and Public Engagement activities, as required
• Ensure all activities are compliant with the Tyndall Quality Management system
• Ensure all activities are compliant with required Health and Safety standards
• Carry out any additional duties reasonably required within the general scope and level of the post

PLEASE MAKE SURE TO ATTACH AN UP-TO-DATE CV AND A BRIEF MOTIVATION LETTER OUTLINING HOW YOU MEET THE ‘ESSENTIAL CRITERIA’ FOR THIS ROLE.

A full candidate information pack is available to download by clicking here.
Please note that Garda vetting and/or an international police clearance check may form part of the selection process.
Please note that an appointment to posts advertised will be dependent on University approval, together with the terms of the employment control framework for the higher education sector.
At this time, Tyndall National Institute does not require the assistance of recruitment agencies.
Tyndall National Institute at University College, Cork is an Equal Opportunities Employer
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