Process Engineer, Photomask Inspection at Micron Technology

Boise, Idaho, United States -

Full Time

Start Date

Immediate

Expiry Date

17 Mar, 26

Salary

0.0

Posted On

17 Dec, 25

Experience

2 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

EUV Inspection, Defect Avoidance, Automatic Defect Classification, Yield Improvement, Cost Reduction, Tool Health Monitoring, Data Analysis, Mentoring, Automation, Statistical Process Control, Defect Printability Performance, Reticle Quality, Communication Skills, Collaboration, AI Tools, Capital Equipment Evaluation

Industry

Semiconductor Manufacturing

Description

Develop solutions for EUV Inspection, Defect Avoidance, ADC (Automatic Defect Classification) Lead / Participate in continuous yield improvement and cost reduction activities Monitor tool health and respond to trends and OOS tool and process conditions Engage with equipment suppliers to evaluate and qualify next-generation inspection tools and improve capabilities of current systems See opportunities to improve inspection processes and suggest projects to close these gaps Ensure accuracy and consistency of inspection results, implement Defect Classification improvements to eliminate errors and improve efficiency. Provide authority insight into tool and process capabilities, advise other teams on most appropriate techniques for data collection depending on the test requirements Collaborate with other engineering teams in R&D and high-volume manufacturing (HVM) to support their inspection needs through data analysis Mentor and train manufacturing personnel and other engineers Drive automation and efficiency efforts to improve KPI's such as First Time Success Rate, Nuisance/False Alarm reduction, equipment availability and RPT. Evaluate and qualify new Capital Equipment in partnership with inspection process and equipment engineering teams. Leverage AI tools to improve efficiency Work with software and equipment vendors to develop and improve ADC (automatic defect classification) algorithms. Work with Inspection Tool Vendors to improve reticle pattern inspection sensitivity. Monitor SPC (Statistical Process Control) and investigate inspection results. Work with FEOL (Front end of the line) Engineering teams to address defect issues, and support fixing via analysis of inspection results. Assess defect printability performance based upon Actinic images and WPC (wafer-print-check) and adjust specs or improve modeling to ensure reticle quality. Ensure all printing defects are detected by pattern inspections, and error rate in shipment is zero. Experience in semiconductor or reticle fab inspection (RDA) area preferred EUV reticle inspection experience is a plus Excellent written and verbal communication skills Highly motivated with the ability to work with limited guidance B.S. or higher degree in Engineering field, Physics, Optics or Mathematics

Responsibilities

Develop solutions for EUV inspection and engage with equipment suppliers to evaluate next-generation inspection tools. Collaborate with engineering teams to support inspection needs and drive automation efforts to improve key performance indicators.