R&D Process Engineer - Plasma Systems at Keysight Technologies - Hong Kong

Santa Rosa, California, United States -

Full Time

Start Date

Immediate

Expiry Date

04 Jul, 26

Salary

0.0

Posted On

05 Apr, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Semiconductor processing, Plasma systems, Dryetch, PVD, Sputtering, CVD, PECVD, Vacuum systems, Statistical process control, Design of experiments, JMP, Root-cause analysis, Process development, Micro-fabrication, Nano-fabrication, RF power delivery

Industry

electrical;Appliances;and Electronics Manufacturing

Description

Overview The High Frequency Technology Center (HFTC) is seeking an R&D Process Engineer to develop, maintain and optimize manufacturing processes to fabricate passive interposer substrates for Keysight’s Heterogeneous Integration technology. This position is onsite at Keysight Headquarters in Santa Rosa, CA. Live in beautiful Sonoma County amongst vineyards, redwood forests, rivers, lakes and coastline while working on state-of-the-art advanced packaging technologies. The Process Engineer will own process development and process control to meet quality and production metrics. Responsibilities include a combination of R&D and manufacturing in partnership with Design, Integration, Test, Operations, Maintenance, Product and Failure Analysis teams. The Process Engineer is accountable for yield, cycle time, throughput, and quality of their process. This role involves technical depth in semiconductor processing, strong hands-on aptitude, as well as effective communication and teamwork to meet department-level objectives. Responsibilities Process Development Engineers at HFTC are responsible for process development and sustaining of custom, cutting-edge, micro and nano-fabrication technologies. The focus of this position is process development, manufacturing sustainability, and R&D support for new product introductions, with specialization in wafer fab processes. Responsibilities include but are not limited to: Deep knowledge and expertise with wafer process development in one or more of the following areas: Dryetch, PVD/sputtering, CVD/PECVD, ashing, or similar vacuum processes Own and advance plasma process performance across etch, CVD, PVD, and/or ashing tools by driving film quality, profiles, uniformity, selectivity, chamber health, defect reduction, and overall process robustness through structured DOEs Collaborate with equipment engineering on tool performance optimization, preventive‑maintenance strategies, throughput enhancements, and new tool installs or upgrades Drive process control and stability through SPC charting, daily reviews, root‑cause analysis, and corrective actions using statistical tools (e.g., JMP) Working closely with other process, integration, product, and circuit design engineers to define process and performance targets Defining process flows, develop new processes and drive continuous process improvement (CPI) efforts to maximize product yield Report process metrics, root cause investigations, and process change implementations at the department level Ensuring successful process hand off to manufacturing partners Working with Operations to implement robust process control and support production processes; diagnose and resolve process problems with urgency Leading capital equipment acquisition projects that include tool evaluation, characterization, process development, and qualification Broader experience in upstream and downstream processes and the ability to understand process interactions Qualifications Knowledge of plasma systems such as Dryetch, PVD/sputtering, CVD/PECVD, or similar vacuum processes. Familiarity with vacuum systems, RF power delivery, gas‑flow control, and chamber‑hardware configurations Strong problem‑solving skills for measurement anomalies and tool‑drift issues Experience with statistical process control (SPC) and design of experiments (DOE) is required. M.S. or Ph.D. in Materials Science, Chemical Engineering, Physics, Chemistry, or related fields. 5+ years of professional, hands-on experience with development and/or maintaining semiconductor processes and equipment. Recent graduates with extensive cleanroom and experimental background will also be considered. Experience with statistical process control (SPC) and design of experiments (DOE) is required. Candidates must have strong problem-solving and analytical skills as well as excellent interpersonal and communication skills for cross-functional interactions. Strong accountability, self-initiative and proactive attitude are required for success. Candidates must be local or willing to relocate to Santa Rosa, CA This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Candidates must be a U.S. citizen or lawful permanent resident of the U.S., or protected individual, having authorization from the U.S. government for export-controlled items under 8 U.S.C. 1324b(a)(3). About Keysight Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our powerful, award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. Diversity, equity & inclusion are integral parts of our culture and drivers of innovation at Keysight. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. This position is at our Headquarters in Santa Rosa, CA. At the center of beautiful Sonoma County, just an hour north of San Francisco, you will live close to vineyards, redwood forests, regional and state parks, and a vibrant culinary scene, while developing state-of-the-art semiconductor manufacturing technologies at our worldclass IC and Heterogeneous Integration fabs. HFTC is part of Keysight Labs, the core R&D organization that enables Centers of Excellence and other business groups to provide RF, microwave, mmWave, 5G and 6G solutions to customers in various industries, including communications, aerospace & defense, automotive & energy, general electronics, manufacturing, AI, and semiconductor industries. HFTC technologies include InP and GaAs-based HBTs, HEMTs, and diodes, as well as high-frequency System in Package (SiP) and PCA subsystem solutions. Careers Privacy Statement Keysight Technologies Inc. is an equal opportunity employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other protected categories under all applicable laws. The level of role and salary will be based on applicable experience, education and skills; Most offers will be between the minimum and the midpoint of the Salary Range listed below. California Pay Range: MIN $138,960 - MIDPT $185,280 - MAX $231,600 Note: For other locations, pay ranges will vary by region. This role is eligible for Keysight Results Bonus Program US Employees may be eligible for the following benefits: - Medical, dental and vision - Health Savings Account - Health Care and Dependent Care Flexible Spending Accounts - Life, Accident, Disability insurance - Business Travel Accident and Business Travel Health - 401(k) Plan - Flexible Time Off, Paid Holidays - Paid Family Leave - Discounts, Perks - Tuition Reimbursement - Adoption Assistance - ESPP (Employee Stock Purchase Plan) #LI-MED1

Responsibilities

The Process Engineer will develop, maintain, and optimize manufacturing processes for passive interposer substrates while ensuring yield, cycle time, and quality metrics are met. Responsibilities include leading process development, collaborating with cross-functional teams, and driving continuous process improvement through statistical analysis.