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RFIC Layout Engineer at Apple
San Diego, California, United States -
Full Time

Start Date

Immediate

Expiry Date

03 Feb, 26

Salary

0.0

Posted On

05 Nov, 25

Experience

10 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

No

Skills

FinFet Experience, Custom RF/Analog Layout, Deep Sub-Micron CMOS, Device Matching, Minimizing Parasitics, RF Shielding, High Frequency Routing, RC Delay, Electromigration, Coupling, Guard Rings, DNW, PN Junctions, Advanced Process Effects, CALIBRE DRC, CADENCE Layout Tools, Scripting Skills

Industry

Computers and Electronics Manufacturing

Description
The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and band gap references. DESCRIPTION As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching, designing and bringing the next-generation of wireless technologies into high-volume production in advanced CMOS technology nodes. MINIMUM QUALIFICATIONS BS and 10+ years of relevant industry experience. FinFet experience. PREFERRED QUALIFICATIONS Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS. Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing. Solid understanding of RC delay, electromigration, and coupling. Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE. High level proficiency in interpretation of CALIBRE DRC, ERC, LVS in FinFet Technology. Knowledge of CADENCE layout tools. Excellent communication skills. Scripting skills in PERL or SKILL.
Responsibilities
As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching, designing and bringing the next-generation of wireless technologies into high-volume production in advanced CMOS technology nodes.