Able to analyze/define/develop/write micro-Architechture specification for a sub-system

- Interact with Architect and understand the Module/Sub-system requirement

- Solid experience in SoC design/Integration aspects

- Need to be adept in finding design solution at SoC level

- Able to write glue logic/gasket/bridge modules as required

- Experience in working large SoC/Chiplet design. Designs with Multi Clock/Reset/Voltage and Power domain

- Should be able to own and drive Quality check of the sub-system (CDC, RDC, Lint, DFT Lint) and take to closure

- Able to review and provide timing constraints at sub-system level. Need to co-ordinate with implementation team

- Experience in High-speed protocol based sub-system like PCIE SS, Ethernet SS, LPDDR is a most preferred