Security ASIC Digital Design/Verification, Sr Engineer

at  Synopsys

WE ARE:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

• Designing and implementing RTL in Verilog and System Verilog.
• Creating and designing test environments for digital hardware Security IP cores and subsystems using System Verilog and UVM.
• Conducting hardware verification of IP cores and subsystems utilizing modern verification techniques such as UVM or formal verification.
• Collaborating with hardware and software security experts to perform functional and performance analysis of embedded hardware/software IP solutions.
• Working within an international team setup, contributing to global projects.
• Ensuring adherence to high-quality standards and best practices in digital design and verification processes.