Security Design Verification Engineer at Synopsys
Porto, Norte, Portugal -
Full Time


Start Date

Immediate

Expiry Date

01 May, 25

Salary

0.0

Posted On

01 Feb, 25

Experience

0 year(s) or above

Remote Job

No

Telecommute

No

Sponsor Visa

No

Skills

Good communication skills

Industry

Information Technology/IT

Description

WE ARE:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Responsibilities
  • Designing and implementing RTL in Verilog and/or System Verilog for Security Applications.
  • Creating and designing test environments for digital hardware Security IP cores and subsystems using System Verilog and UVM.
  • Conducting hardware verification of IP cores and subsystems utilizing modern verification techniques such as UVM or formal verification.
  • Collaborating with hardware and software security experts to perform functional and performance analysis of embedded hardware/software IP solutions.
  • Working within an international team setup, contributing to global projects.
  • Ensuring adherence to high-quality standards and best practices in digital design and verification processes.
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