Semiconductor and Die Fab Process Engineering Manager at Keysight Technologies - Hong Kong

Santa Rosa, California, United States -

Full Time

Start Date

Immediate

Expiry Date

06 May, 26

Salary

273250.0

Posted On

05 Feb, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Semiconductor Process Engineering, Leadership, Team Management, Process Development, Optimization, Project Management, Technical Expertise, Problem-Solving, Communication, Physical Vapor Deposition, Solvent Processes, Die Fab, Die Sort, Visual Inspection, Continuous Process Improvement, Cross-Functional Collaboration

Industry

electrical;Appliances;and Electronics Manufacturing

Description

Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. Keysight Technologies, the world's premier measurement company, has an opening for a Semiconductor and Die Fab Process Engineering Manager at the High Frequency Technology Center (HFTC) in Santa Rosa, California. Live in beautiful Sonoma County amongst vineyards, redwood forests, rivers, lakes and coastline while working on state-of-the-art ICs and devices. HFTC invents and delivers world-leading compound semiconductor and integration technology in our fabrication facilities located in Santa Rosa. Our team enables Keysight product leadership through semiconductor innovation for differentiated performance. Responsibilities The Semiconductor and Die Fab Process Engineering Manager will lead a team of engineers and technicians responsible for maintaining, developing, and optimizing semiconductor wafer processes for manufacturing and new technology development. This role requires a strong technical background in PVD and solvent processes. Excellent leadership skills, and the ability to drive continuous process improvement is a must. Additionally, this role will manage the Die Fab engineering team and oversee HFTC’s die fabrication process area. Key Responsibilities: Leadership and Team Management: Manage, lead, mentor, and develop a team of process engineers and technicians. Foster a collaborative and high-performance work environment. Set clear goals & expectations and provide regular feedback and performance evaluations. Process Development and Optimization: Oversee the development, optimization, and implementation of semiconductor processes. Includes physical vapor deposition and solvent processes Oversee the development, optimization, and implementation of Die Fab processes. Includes saw & laser separation, die sort, and visual Ensure processes meet quality, yield, and productivity targets. Collaborate with cross-functional teams to resolve process-related issues and drive improvements. Project Management: Manage multiple projects simultaneously, maintaining assurance of supply and alignment with Keysight’s top priorities. Develop project plans, allocate resources, and monitor progress. Effectively communicate project status and results to key stakeholders. Technical Expertise: Stay current with advancements in semiconductor processing technology, equipment, techniques, and industry trends. Provide technical guidance and support to the engineering team. Qualifications Master’s degree or Ph.D. in Electrical Engineering, Materials Science, Physics, or a related field. Minimum of 5 years of experience in semiconductor process engineering or equivalent proven technical skills Expertise in Die Fab (physical vapor deposition and solvent processes, die sort, and visual) is required Proven leadership experience, with a track record of managing and developing engineering teams. Strong technical knowledge of semiconductor processes is a must, while experience specifically with III-V compound-semiconductor systems is a plus. Excellent problem-solving, project management, and communication skills. Candidates must be local or willing to relocate to Santa Rosa, CA This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Employment in this position for non-U.S. persons is contingent on Keysight’s ability to obtain any required government authorizations. Careers Privacy Statement***Keysight is an Equal Opportunity Employer.*** Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other protected categories under all applicable laws. The level of role will be based on applicable experience, education and skills; Most offers will be between the minimum and the midpoint of the Salary Range listed below. Santa Rosa, CA MIN $163,950-MID $218,600- MAX $273,250 Note: For other locations, pay ranges will vary by region This role is eligible for Keysight Results Bonus Program US Employees may be eligible for the following benefits: Medical, dental and vision Health Savings Account Health Care and Dependent Care Flexible Spending Accounts Life, Accident, Disability insurance Business Travel Accident and Business Travel Health 401(k) Plan Flexible Time Off, Paid Holidays Paid Family Leave Discounts, Perks Tuition Reimbursement Adoption Assistance ESPP (Employee Stock Purchase Plan) #LI-MED1

Responsibilities

The Semiconductor and Die Fab Process Engineering Manager will lead a team responsible for maintaining and optimizing semiconductor wafer processes. This includes overseeing the development and implementation of processes to meet quality, yield, and productivity targets.