SENIOR ARCHITECT, IRIS2 DIGITAL DESIGN

IRIS2 is the new European Union secure satellite constellation. This project is the European Union’s answer to the pressing challenges of tomorrow to provide secure connectivity services and enhanced communication capacities to the EU and its Member States as well as to governmental users, private companies and European citizens while ensuring high-speed internet broadband to cope with connec-tivity dead zones.
SES – together with other consortium partners and core members - was selected by European Commission to build and to operate the IRIS2 multi-orbit satellite constellation. As the project enters its next phase, our team is expanding to support the development of future services and products enabled by the IRIS2 system. We are now seeking skilled professionals to help shape the service provisioning landscape and ensure the successful deployment of cutting-edge sat-ellite connectivity solutions.

QUALIFICATIONS & EXPERIENCE

• Master’s degree or Ph.D. in electrical engineering, computer engineering, or a similar discipline.
• 10+ years of electronic equipment design experience, preferably in the space sector.
• Hands-on experience in implementing FPGA, RF SoC, ASIC and processor-based designs.Fluency in English, any other language considered as an asset

OTHER KEY REQUIREMENTS/COMMENTS

• The candidate must be eligible for a “SECRET” security clearance, in accordance with the “loi modi-fiée du 15 juin 2004 relative à la classification des pièces et aux habilitations de sécurité”, as well as EU/ESA/NATO equivalents
• Willing to work at least 66% onsite from office
• Travel as required for project realization purposes
  SES and its Affiliated Companies are committed to providing fair and equal employment opportunities to all. We are an Equal Opportunity employer and will consider all qualified applicants for employment without regard to race, color, religion, gender, pregnancy, sex, sexual orientation, gender identity, national origin, age, genetic information, protected veteran status, disability, or any other basis protected by local, state, or federal law.
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ROLE DESCRIPTION SUMMARY

We are seeking a highly skilled and experienced Digital Design Architect to lead the definition and development of the advanced digital subsystems within the IRIS2 satellite payload and user terminal.
In your role, you will define the digital architecture of multiple subsystems compounding the high-throughput space transport network of the IRIS2 constellation – including, but not limited to, regenerative on-board processor, antenna digital beam-forming subsystem and user link modem. These digital subsystems may leverage a range of implementation technologies, from software-defined platforms (FPGA, SoC, processors) to commercial off-the-shelf (COTS) or custom ASICs.
The work will require close coordination with broader space segment and ground systems to ensure architectural coherence across active antennas, optical terminals, on-board computers, and other key subsystems.
As a member of an agile project organization, you will be expected to bring a flexible way of working and an adaptive mindset to a dynamic development environment.

PRIMARY RESPONSIBILITIES

• Lead the definition for all digital hardware (ASICs, boards or equipment) requirements and associated documentation as well as its submodules.
• Identify and master all relevant FPGA/SoC/Processor/ASIC based architectures for the implementa-tion of onboard regenerative processor unit, digitally beamformed active antennas, and ground user terminal.
• Perform exhaustive exploration of architectural implementations, understand the trade-offs and provide analysis about these.
• Evaluate key performance metrics of architectural trade-off linked to signal integrity, service quality, power consumption, thermal behavior, cost and overall system limitations.
• Define subsystem architectures and associated verification methodologies.
• Produce and maintain architectural-level documentation to enable downstream firmware, software, electronic, mechanical, and thermal design activities.
• Define technical specifications for digital subsystems in coordination with internal stakeholders and/or with external industrial partners.
• Review and coordinate the electronic, physical, mechanical and thermal design process, providing hands-on support when and where needed to internal or external stakeholders.
• Define, review and coordinate risk mitigation activities which may include, but not limited to, testing prototype models in the lab up to in-orbit demonstration.
• Provide concrete support on performance metrics to other satellite payload and user terminal stakeholders as well as higher assembly level design and analysis.
• Collaborate with cross-functional teams.
• Document digital subsystem design specifications, analyses, test plans, and verification reports.Collaborate with other internal stakeholders as well as with partners in the overall life cycle of the subsystems.