Senior ASIC Digital Engineer (DFT, MBIST, Scan) with 5 to 7 years of experi at Sandisk

Bengaluru, karnataka, India -

Full Time

Start Date

Immediate

Expiry Date

13 Oct, 26

Salary

0.0

Posted On

15 Jul, 26

Experience

5 year(s) or above

Remote Job

Yes

Telecommute

Yes

Sponsor Visa

Skills

Design For Testability (DFT), ASIC Development, ATPG, BIST, Verilog, VHDL, C++, EDA Tools, Low-power Design, IEEE 1149.1, IEEE 1500, Digital Circuit Design, Semiconductor Manufacturing, Fault Coverage Analysis, Post-silicon Debugging, Verification Methodologies

Industry

Semiconductor Manufacturing

Description

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description We are seeking a highly skilled Staff Engineer specializing in ASIC Development Engineering with a focus on Design for Testability (DFT) to join our team in Bangalore, India. In this role, you will be responsible for developing and implementing advanced DFT strategies for complex ASIC designs, ensuring high-quality, testable, and manufacturable semiconductor products. Lead the development and implementation of DFT architectures for complex ASIC designs Collaborate with cross-functional teams to integrate DFT solutions into the overall ASIC design flow Develop and optimize test patterns using Automatic Test Pattern Generation (ATPG) tools Implement Built-In Self-Test (BIST) solutions for various ASIC components Analyze and improve test coverage, fault coverage, and test time for ASIC designs Troubleshoot and debug DFT-related issues during the design and post-silicon phases Stay current with industry trends and emerging DFT technologies Mentor junior engineers and contribute to the development of best practices and methodologies Participate in design reviews and provide technical guidance to ensure DFT requirements are met Collaborate with external partners and vendors to evaluate and integrate new DFT tools and technologies Qualifications Master's degree in Electrical Engineering, Computer Engineering, or a related field 7+ years of experience in ASIC development with a strong focus on DFT Advanced knowledge of ASIC design and development processes Expertise in Design for Testability (DFT) methodologies and techniques Strong programming skills in languages such as Verilog, VHDL, and C++ Proficiency in using EDA tools for ASIC design, verification, and testing In-depth understanding of semiconductor manufacturing processes Experience with advanced DFT techniques, including BIST and ATPG Knowledge of low-power design techniques Familiarity with industry standards such as IEEE 1149.1 and IEEE 1500 Excellent problem-solving and debugging skills Strong analytical and organizational abilities Exceptional communication and teamwork skills Domain expertise in the semiconductor industry, digital circuit design, and test and verification methodologies Ability to work efficiently in a fast-paced, detail-oriented environment Willingness to mentor junior engineers and contribute to team knowledge sharing Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Job Type (exemption status): Exempt position - Please see related compensation & benefits details below Business Function: ASIC Development Engineering Work Location: Bangalore PTP Office (IBP)--LOC_WDT_IBP

Responsibilities

Lead the development and implementation of DFT architectures and strategies for complex ASIC designs to ensure high-quality semiconductor products. Collaborate with cross-functional teams to optimize test patterns, implement BIST solutions, and mentor junior engineers.